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I'm working with an overseas vendor.

We've tested the electronics and code of the product. We gave them the green light to start chip masking. However, a few days later we realized that the working samples of the toys had dB levels (for sound effects only) are too loud for a toy.

The vendor said that we can still change the program.

My understanding is that once chip masking starts we can't change the program anymore.

Can someone explain to me the detailed steps of the Chip Masking process and what can still change during that process?

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  • \$\begingroup\$ Maybe you better ask your vendor? \$\endgroup\$ – Eugene Sh. Nov 9 '16 at 23:35
  • \$\begingroup\$ I have but I'm working through a rep and they are not answering my questions. This question is also a general question to understand the chip masking process. \$\endgroup\$ – milesmeow Nov 9 '16 at 23:36
  • \$\begingroup\$ What is the "chip masking" process? Do you mean starting to make a set of photomasks? Or actual wafer production? Maybe you need to learn proper terminology first, so people will start answering? \$\endgroup\$ – Ale..chenski Nov 9 '16 at 23:48
  • \$\begingroup\$ Hmmm ok. This is already educational. We have the vendor start 'chip masking' after we approve the program and breadboard. UsuaLly MASKING takes 30-60 days. After this they can give us a pre-production sample of the working toy. What terminology should I be using? Am I using it correctly? Thanks! \$\endgroup\$ – milesmeow Nov 9 '16 at 23:52
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    \$\begingroup\$ It would help if you identified the type of chip, and what is being programmed. Structured asic, or CPU with code in ROM? Analogue or digital circuits? \$\endgroup\$ – Sean Houlihane Nov 10 '16 at 0:24
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Chip fabrication is divided into two steps, FEOL and BEOL

The manufacturer has to start with FEOL where all the components (transistors, resistors, capacitors) are created in the silicon.

Only when FEOL is done, BEOL can start.

BEOL is the step where all the components on the chip are connected to make circuits. This is also the step which will define the mask ROM data in your chip.

Often FEOL is more complicated and takes more time than BEOL so that is why although they've started, they can still allow for changes in the BEOL part of the design.

Probably your chip vendor has split the process in two, they first make the FEOL masks and start processing. When the FEOL is almost finished they make the masks needed for BEOL. Making the BEOL masks already at the start of FEOL makes little sense as they're not needed until FEOL is finished and BEOL starts.

This also allows for ROM data updates as that is BEOL only.

So the mask needed to program the data on the chip is probably not made yet so they can easily change it even though they started making the masks already. But those will be FEOL masks, not the BEOL masks with the ROM data.

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