fullscale value of timer [closed]

I am going through a timer programming for a micro controller and i was wondered about the term "full scale value" of a timer.What the full scale value of the timer exactly means.

Thanks, Vijay.

closed as unclear what you're asking by Marcus Müller, Leon Heller, Bence Kaulics, laptop2d, Dave Tweed♦Nov 12 '16 at 15:06

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• It probably means the largest value the timer can measure. If you provide a link to the datasheet you are reading, someone will be able to give a proper answer. – Jack B Nov 11 '16 at 11:00
• Note that some timers can be configured to use less than their full-scale value so that you can finely adjust the time after which the timer logically overflows. – JimmyB Nov 11 '16 at 15:26

"Full scale" means the interval represented by the largest digital number that the timer register(s) can handle.

Usually this is all 1's if the register contains a "1's complement" value - ie all 1's is the largest value, or all ones except the MSB if the counter register represents a "2's complement number. In the latter case an MSB of 1 represents a negative number (except for value 100...0 as an N bit register can represent 2^(n-1) positive values, 2^(n-1) - 1, negative value plus zero.

Counters usually are considered to be positive numbers so for eg an 8 bit counter the FS value is 11111111 and the minimum value is 00000000

1's complement numbers (positive numbers only) have the property of "rolling over" from FS value to zero in 1 count and then 'starting again' from 0.
eg for a 2 bit register the sequence is 00 01 10 11 00 representung value 0 1 2 3 0 ... in base 10

2's complement numbers (negative if MSBb = 1) have the property of "rolling over" from FS positive value to the MAXIMUM NEGATIVE value in 1 count and then incrementing towards zero. (I say incrementing as although the magnitude of the number decreases eg -7 -6 -5 ...) the number becomes more positive at eacg count.
ie -6 > -7
eg for a 3 bit register the sequence is 00 01 10 11 00 ... as before BUT this now represents 0 1 2 -1 0 ... in base 10.

That's a bit hard to see - a 3 bit counter is easier to follow

Counter
|  1's complement value
|  |  2's complement value
|  |  |
000 0  0
001 1  1
010 2  2
011 3  3
100 4  4*  <- exception to msb =1 = negative "rule"
101 5 -3
110 6 -2
111 7 -1

000 0 0
001 1 1
...

• This is very confusing. "1's complement" and "unsigned" do not mean the same thing. – Dave Tweed Nov 12 '16 at 15:04