# GPS Patch Antenna Feed Pin PCB Layout

On a PCB a GPS patch antenna should be placed. The antenna feed pin goes through the board and is soldered on the bottom side. On the PCB top layer is a ground plane. My problem is now to define the radius of the area around the feed pin that has to be kept ground free to achieve the best signal transmission. See graphic of cross cut.

Can anyone help me with this problem?

Parameters: PCB material FR4, 0.8mm thick. Antenna impedance 50 Ohm, feed pin diameter 0.8mm.

• Why do you need to do this? Nov 11, 2016 at 17:54
• Andy Aka - What? Keeping the area free? Nov 11, 2016 at 17:56
• Yes, why does it need to be free and not just the normal clearance to maintain correct impedance through the PCB? Nov 11, 2016 at 17:58
• So what is the normal clearance? Nov 11, 2016 at 17:59

As you can see in the picture of the bottom of the patch antenna, the manufacturer also has an opening in the ground plane of the antenna where the feed exits.

You will be fine if you match the size of that opening.

You could treat the feed pin and surrounding copper like a short piece of coax. Coax has a characteristic impedance defined by its inner and outer diameters: -

It's not going to be a million miles wrong given fringing effects - no more than double for what a real piece of coax is but is it really a big issue - your PCB is 0.8 mm thick and there are rules of thumb about mismatches and the same rule of thumb is pretty useful in many scenarios: -

For instance, if the length of a piece of wire is less than one-tenth the wave length of a signal then it's probably not worth worrying so, at 0.8 mm long is this realistically going to pose a severe problem for a frequency less than 1.5 GHz - at this frequency the wavelength is 200 mm.

Use a calculator for a co-planar waveguide. Here's one: http://chemandy.com/calculators/coplanar-waveguide-with-ground-calculator.htm

This assumes that your topology is a ground plane "under" your antenna feed trace and ground plane on either side of your antenna feed trace, and stitching vias from the top GND to bottom GND tightly spaced along the feed trace path. Like this picture shows.

Actually the picture doesn't show stitching vias, but I have used them in the past. Some smarter RF engineer might say one way or the other whether this is a good idea. At any rate, it's a geometry + material properties problem. Use a calculator.