A seemingly simple question that has a myriad of answers all over the web.

Goal: I am trying to design a device that is able to read analog audio and extract frequency distribution. I do not care about absolute amplitude, only relative amplitude, i.e. I am only trying to compare the intensity of certain frequencies in a given audio signal.

Why the other answers don't cut it: All the answers that I have found don't seem to address the issue of differing peak to peak voltage device to device and volume setting to volume setting. My device is going to sit between source and speaker, so it needs to be able to recalibrate when volume is changed. It will also be used with at least three different devices: my desktop, laptop, and phone. The P2P voltage at max volume on the headphone outputs of these 3 devices varies from hundreds of mV to 4V. My understanding is that there exist other devices with P2P voltages as high as 12V. I would like to design with those devices in mind as well.

I intend to use the ADC on my MCU with range 0-3V3.

If it wasn't clear already, I am by no means an electrical engineer and my understanding is fairly limited and I have not been able to devise a way to make this work. The issue the way I see it is that I need a circuit that will adjust gain and dc offset appropriately based on the source.

My thoughts so far: My current solution is to use two opamps as a peak detector and use that to add a dc offset to the signal using another opamp as an inverting amplifier. The gain of this amplifier will be adjusted using a digital potentiometer that is being controlled by the MCU. The amplifier starts at max gain and keeps stepping down until the peak of the signal is less than 3V3. The solution has the benefit that with a push of a button, I can reset the peak detector and instruct the MCU to begin recalibration. I am not at all married to this solution (I am asking how to best solve my goal, not how to fix the solution).

My Solution

However, I'm unsure how to protect my MCU from being damaged by input voltages greater than 3V3 (since the calibration method relies on starting above 3V3 and coming down).

  • \$\begingroup\$ What power supply voltages do you have in your design? \$\endgroup\$ – ThreePhaseEel Nov 12 '16 at 5:34
  • \$\begingroup\$ @ThreePhaseEel, it doesn't really matter what supply voltages are being used. If the input signal is protectively clipped to the supply voltages then the devices are protect regardless of the specific voltage. \$\endgroup\$ – Richard Crowley Nov 12 '16 at 5:45
  • \$\begingroup\$ @RichardCrowley -- I'm asking to get an idea of what parts can be used in this design :) (being on single-supply 5V or 3.3V for the analog side is a different constraint than being able to run your AFE off of +/-15V, even with the ADC in both cases being a 0-3.3V unit) \$\endgroup\$ – ThreePhaseEel Nov 12 '16 at 5:50
  • \$\begingroup\$ I have a +12V, a +3V3, and 0V in my current design. I had planned on the opamps running on +12V/0V and the MCU (and the ADC since that is built in) running at 3V3/0V. \$\endgroup\$ – The Great Java Nov 12 '16 at 5:54
  • \$\begingroup\$ Not an expert, just throwing in the idea that what you describe must be how an AGC works, isn't it? \$\endgroup\$ – Roger Rowland Nov 12 '16 at 6:20

You are on the right track. It is very unlikely that over-voltage audio signals will cause any kind of "damage" to the CPU or the ADC. The worst that can happen is that the signal will be "clipped" or "flat-topped" which will cause distortion. So you can write the firmware for your application to look for an extended sequence of minimum (zero) or maximum (your did you reveal your digital resolution?) and reduce the gain of the input stage. Or conversely detect an average audio level that is too low, and increase the gain, etc. You may be anticipating "problems" that aren't really "problems".

  • \$\begingroup\$ Thanks for your reply. I haven't yet decided on a good balance of sample rate and resolution, so I left that part out of the question. I don't think that's too big of a deal, mostly just a tangential issue that I will need to figure out based on some more data sampling and basic math. Yeah, I felt I might be overthinking this. Very few devices are going to have extremely high voltages, and most will probably be close to 500mV-1V RMS. But I have had too many projects fail because I forget edge cases exist, and so I like to consider them and design for them if possible. \$\endgroup\$ – The Great Java Nov 12 '16 at 5:38
  • \$\begingroup\$ Yes, it is very admirable to consider the edge cases and you are exactly right to do so. However you are working with an incorrect assumption that high-amplitude input signals will be "harmful" in any significant way. \$\endgroup\$ – Richard Crowley Nov 12 '16 at 5:43
  • \$\begingroup\$ I am not sure I understand why they won't be. Is it because there isn't any real current actually running into the ADC (provided there is a pull down)? \$\endgroup\$ – The Great Java Nov 12 '16 at 5:50
  • \$\begingroup\$ Analog to digital converters need very little signal current to operate properly. So you can use a relative high-value series input resistor to reduce input over-voltage fault current. AND use diode(s) to CLAMP the input signal to a safe level. If you detect that the input signal is being clamped by the protection circuit, then you simply reduce the level by means of your digital pot. \$\endgroup\$ – Richard Crowley Nov 12 '16 at 5:53
  • \$\begingroup\$ I didn't even think of putting a diode clamp on the out end of it. In hindsight, that was a pretty obvious solution. Especially since it doesn't need to be very precise, just within the tolerance of the MCU GPIO pins. And it makes detecting clipping a lot easier too if you use a transistor for one of the clamps and set up an interrupt on a digital GPIO pin. Thanks. \$\endgroup\$ – The Great Java Nov 12 '16 at 9:23

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