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I would like to filter signal on ADC input. My question is if I can add before input ordinary RC filter. I suppose that this is not good idea. I have to limit number of operational amplifiers on the board so it can't be isolated by buffer amplifier.
If resistance is too big the internal (S&H) capacitor will not fully recharge. Capacitor from RC filter will be parallel with capacitor from S&H and it will change the capacitance of sampling capacitor? Am I right or not ?
cheers
When not sampling, the filter capacitor will charge to the filtered vin value. Now when you sample, charge will move from the filter cap to the hold cap. The resistor is there but doesn't have much to do with it. If the filter cap is large compared to the hold capacitor, then the voltage will change very little and the hold capacitor will charge very quickly.
Generally a C to ground at the input of a sampling converter is a good idea, as it provides a reservoir for the charge needed by the converter. Check the data sheet for what value capacitors are OK. Once the C is providing the charge, a series R is usually OK. Again check the converter data sheet for recommendations on the value of the R.
A simple RC filter will get the job done but you'll be sacrificing a lot of bandwidth. The maximum frequency you can sample is 1/2 sampling frequency so with 48kHz sampling frequency you'd be limited to 24kHz or less. To achieve that you actually need to set filtering corner frequency at a lower frequency to have adequate attenuation at the 1/2 sample frequency.
You only get -20dB/decade of attenuation with RC filter so to get -20dB attenuation at that 24kHz frequency, your corner frequency should be 2.4kHz so you're filtering out quite a lot.
You'd really do better with 2nd or 3rd order opamp filter which requires you to use one of your opamps. See some examples here: http://www.edn.com/design/analog/4363970/Design-second-and-third-order-Sallen-Key-filters-with-one-op-amp
Here's a neat tool for designing the 3rd order sallen key filter. Just give it the cherbychew corner frequency and off you go. You probably want to define C1=C2 based on some convenient component value. http://sim.okawa-denshi.jp/en/Sallen3tool.php
With regards to the capacitor, what will actually happen (with some ADC types e.g. sample and hold input stage) is that the charge from the external capacitance transfers to the internal capacitance. So you in fact want to have enough capacitance to keep this glitch < 1/2 ADC unit.
In this case, we need to talk about impedance.
The ADC will have specified a certain maximum impedance for its input signal. That number already factors in the S&H capacitor, so in the simple case you have just an R/C of the signal impedance/line resistance and the S&H C. You are allowed to increase the signal's impedance up to the maximum, so you can just add a resistor in line to get close to that value.
Notice that a C to ground decreases the impedance, so it only makes sense if your signal impedance (after the R) is bigger than allowed. If it is, then you need to select (for a given R) a C to get to within the allowed impedance range for the frequency of the signal.
Hence, the numbers for R and C to use can be figured out from the required impedance of the ADC and the signal's frequency alone.
