I have to design a sequential circuit for a traffic light controller. It has 6 outputs, Red-Green-Yellow for North/South and East/West lights. What has to happen is that every 8 clock cycles (one clock cycle is represented by 1 button push, so after 8 button pushes, the lights switch) the lights have to change. So, the order would be
R(N/S)-R(E/W) -> R(N/S)-G(E/W) -> R(N/S)-Y(E/W) -> R(N/S)-R(E/W) ->
G(N/S)-R(E/W)-> Y(N/S)-R(E/W) -> R(N/S)-R(E/W) -> R(N/S)-G(E/W)... and so on.
I have created a diagram, truth table, and equations. As far as I can tell, I have everything connected and put in correctly (We're using quartus to program a DE0). I have a 3 bit register connected to the combinational circuit for my state machine.
Only thing I can think of being wrong at this is that my initial design is completely wrong. What's happening is that after 8 clock cycles the state doesnt change.
Here are pictures of my state diagram, truth table, k-maps, and equations. Ignore the min terms box. Its just a way I sort through the truth table because it is hard to read.
EDIT: What I am asking is, is my design sound? Am I fundamentally making a problem with the state diagram?