According to Robert F. Pierret (1996) in page 411 of the 2nd edition of the textbook Semiconductor Device Fundamentals, common emitter input of PNP BJTs is insensitive to base width modulation. Isn't the common emitter input simply the base current \$I_B = I_E - I_C\$ and assuming that the BJT is operating under active mode, should be sensitive to base width modulation since \$I_E\$ and \$I_C\$ depend on the quasineutral base width \$I_B\$? Moreover, \$I_B=\frac{I_C-I_{CE0}}{\beta_{dc}}\$ and \${\beta_{dc}}\$ is clearly dependent on the quasinuetral base width W which means \$I_B\$, the common emitter input, should be dependent on \${\beta_{dc}}\$ as well?

  • The base emitter voltage is the input to the common emitter. – user110971 Nov 21 '16 at 6:28
  • Maybe that was referring to older PNP's with really long bases before the 1st edition unlike today. – Tony EE rocketscientist Aug 4 '17 at 0:41

The effect we call "base width modulation" is caused by changes of \$ V_{CE} \$. These changes result from the signal induced voltage drop across the collector resistor \$ R_{c} \$ and act back to the effective base width. The result of base width modulation is the finite output resistance \$ r_{o} = { 1 \over h_{22} }\$.

These effects have no (resp. minor) influence on the base-emitter path because the parameter \$ h_{12} \$ (reverse voltage gain) is very small and is normally neglected (decoupling between output and input for common emitter operation).

The influence of \$ v_{ce} = d(V_{CE}) \$ as well as \$ h_{12} \$ can be evaluated by inspection of the input resistance expression at the base node:

$$ r_{1b} = { h_{12} * v_{ce} + h_{11} * i_{b} \over i_{b} } $$

(All symbols are differential small-signal values)

Base Width Modulation sets the limit for achieving lots of voltage gain, should you replace the usual resistive load in the collector with a constant current load crafted for Millions of Ohms. Or perhaps the Vearly param sets the limit for voltage gain. (You can stiffen the CE amplifier with resistors in the emitter, flattening that Vearly effect.)


simulate this circuit – Schematic created using CircuitLab

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