I need a circuit that would stay on after being triggered

I am a year one electrical engineering student, and I am currently doing a project about building an electrical robot car. One of the required features of the car is to add a front sensor to the front, and it will continuously reverse backwards when it detects a white wall. (So, in other words, it will continual to move backwards even after it can't detect the wall anymore) But, I am having problems on how to implement this.

The front sensor provided will be on high when it detects nothing in front, and on low when it detects a white wall. I know that I need the signal to stay on low after it detects the wall. So I need a circuit that would stay in the new state after being triggered.

I hope I have my question clear enough... thank you.

P.S. Some of the ideas discussed in class were D flip flops, I'm not sure if that's the idea to be put in here.

P.S. I need to mention that we are only allow to use ICs like D flip flop, JK flip flop, counter. comparators, timers, not gates, or gates, and gates, and other basic gates ICs.

• You need a bistable (two-state) circuit. You can certainly do this with a D flip-flop, with a clock signal triggered on the falling edge of the sensor output signal. – DerStrom8 Nov 22 '16 at 19:03
• hmmm... sorry I don't think I get it. I've been researching a lot on D flip flops but I never quite get the concept. Is it possible to make more clear?? Thanks. – Cherub Nov 22 '16 at 19:20
• How long do you want it to stay in the new state after being triggered? Forever? Right now it sounds like the first time it hits a wall it will reverse forever. – mkeith Nov 22 '16 at 19:23
• A D flip-flop changes its output state (HIGH/LOW) on the rising edge of the clock depending on the state of the D input. If the clock goes HIGH and the D input is HIGH, then the Q output also goes HIGH. If the clock goes HIGH and the D input is LOW, then the Q output goes low. The output keeps its state between rising edges of the clock – DerStrom8 Nov 22 '16 at 19:24
• @Cherub The D flops may include both a SET and RESET. If so, make sure to use the SET line with whatever you use to initialize the whole system. That will ensure that it starts as high. Tie the /Q to the D input. When the necessary clock arrives (properly arranged), the D flop will copy the /Q (low at the time) to the new Q output. – jonk Nov 22 '16 at 19:49

Okay. To summarize, then:

simulate this circuit – Schematic created using CircuitLab

Hopefully, that matches up with what you are now thinking. This assumes that setting CLEAR to ground avoids clearing the FF. You'll need to activate the PRESET line whenever you reset things and start everything up before starting.

It's important to note that the simplicity of the above circuit depends on the fact that your sensor signal is clean and doesn't repeat itself. The Photon makes a good point. So here's another approach that covers his comment:

simulate this circuit

Which you use depends, I suppose. But given your stated interest, I think The Photon's point is more important and that you should use the second circuit and not the first. Just to be safe.

• @ThePhoton Indeed. But I don't know the sensor situation. Point is worth adding to my answer, though. Added. And thanks! – jonk Nov 22 '16 at 20:13
• So I was just experimenting it on the breadboard and I couldn't get it to preset somehow. output Q always comes out to be same as D. – Cherub Nov 22 '16 at 20:51
• @Cherub If there is a PRESET and a CLEAR, they should do opposite things to Q and they should ignore D. Keep the clock line tied to VCC or ground, though. If you float it, who knows? That may be your problem, given your observation. – jonk Nov 22 '16 at 21:13

I see suggestions using logic gates and flip-flops.

Has anyone considered a much simpler and cheaper approach like using a SCR?

https://en.wikipedia.org/wiki/Silicon_controlled_rectifier

Seems much simpler and yet attends the requirements. SCRs have the exact purpose of starting to conduct when the gate is stimulated while they keep conducting after the stimulus is interrupted.

The gate should be connected to the sensor, the anode to VCC (better if protected by a current limiting resistor) and the cathode (with a pull-down resistor) will output the logic level matching the requirement.

Reset button: A normally-closed momentary switch can be added between the VCC and the anode resistor to serve as the reset button.

• A SCR isn't really cheaper than a jellybean DFF IC in this day and age... – ThreePhaseEel Nov 23 '16 at 1:53
• Unfortunately, the professor doesn't let us use ICs that are not provide tho. – Cherub Nov 23 '16 at 7:18

.............

This should work: