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I'm trying to calculate the ENOB bits of my a PIC18F26K22 ADC, the problem is that I can only find the DC error specifications, namely, Gain Error, Offset error, Integral Linear Error,etc.

But I'm looking for AC specifications,like SNR, ENOB or Total Harmonic Distortion. I tried to find in several PIC18 family devices and even in Pic32 datasheets and all show the same kind of DC characteristics. The typical table I found is like in the figure bellow. Is this type of ADC so bad for AC that they don't even bother list its characteristics ?

enter image description here

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  • \$\begingroup\$ Yes the micro controller ADC is not terribly high bandwidth. All the ADC can do is take individual samples and then it's up to you to interpret them. For example if your looking for an RMS value you would have to capture the peak and then divide by radical 2. For AC you are better off using an external ADC (ture RMS maybe) and then talking to it with the micro controller. \$\endgroup\$
    – vini_i
    Commented Nov 24, 2016 at 12:49
  • \$\begingroup\$ I don't think I've ever seen such parameters on an embedded processor's ADC. Usually they are so noisy that for slowly moving signals multiple samples are made (either in HW or SW) to improve the accuracy / number of significant bits. I think Microchip has taken to publishing shorter individual processor specifications. Then putting detailed information about features such as the ADC in a separate documents intended to be used for a family of processors. You might try searching with that in mind. \$\endgroup\$
    – st2000
    Commented Nov 24, 2016 at 12:50
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    \$\begingroup\$ Generally if you're looking for that kind of specification (THD etc.) you won't be at all happy with the internal ADC. Lower limit on noise is obviously the quantization noise, actual noise will be higher. \$\endgroup\$ Commented Nov 24, 2016 at 16:20

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The specs you show will be met over the valid range of sampling time and conversion clock speed. You can look at those specs to find the maximum rate the A/D can be run at. That's the upper frequency, if you do everything else right, at which the errors won't exceed what you show.

Put another way, they are specifying each sample as a independent event. It's up to you how to string those together, within the limits of signal impedance, acquisition time, and conversion clock period.

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All microcontrollers have hundreds of milliVolts of GND and VDD bounce/ring/spikes as the busses and latches and memory fetches occur. The "gnd" rail is also the substrate upon which all the FETs are built, and the capacitors (needed by ADC) are built.

Microcontroller manufacturers often allocate separate AGND and AVDD (located right next to each other, for lowest inductance and thus best control of the onchip AGND and AVDD.

Couple things you can try: 1) place 0.1uF SurfaceMount between VREF+ and VREF- 2) place a differential lowpass filter (R+C) in the ADC's Vin- and Vin+ pins; you need 2 resistors and 3 capacitors. Resistors go into the signal paths; the caps go(a) between Vin+ and Vin- right at the ADC, after the resistors; (b) between Vin+ and AGND; (c) between Vin- and AGND. 3) shut off the ADC as you digitize the AC input, placing the samples via DMA

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For AC performance, the sampling jitter is a big deal. Getting less than 1nanosecond jitter, given onchip clock multiplication, is doubtful. If you are grabbing samples into a DMA, the DMA logic is spiking DVDD/DGND as the flipflops accept the lastest ADC word, and there is no quiet time.

Consider dampening the VDD bypass capacitors, so the VDD does not ring and ring. [The IC manufacturer's silicon evaluation engineers may have favorite PCBs/lossyCaps, but do not document it.] Do this for DVDD and for AVDD. With 10nF and 10nH (leadframe + PCB + cap) and Fring of 16MHz, you need Rdamp of sqrt(L/C) = 1.0 Ohms. Experiment

Some MCUs + ADCs meet the ADC spec.........if the MCU clock is slowed down, so there is 100nS or 200nS of quiet time for the VDD/VREF/substrate bouncing to die away before the binary-search analog comparator makes a decision. A Burr Brown 24-bit ADC was integrated with a MCU rated at 33MHz; the datasheet, read carefully, warned the 24-bit ADC was only 24 bits if clock was reduced to 8MHz, allowing 125 nanosecond of quiet time.

By the way, its your task to ensure VREF settles quickly.

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You can find out some of the information from this; Microchip A/D Performance Specifications

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  • \$\begingroup\$ This is not what I'm looking for. This application note describes the different error parameters. But I'm looking for its actual value, which depends on each type of ADC module. Nevertheless, thank you for trying to help. \$\endgroup\$ Commented Nov 24, 2016 at 15:13

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