Please consider the differential amplifier (Q1&Q2) with current mirror active load (Q3&Q4) as shown below:
I know many questions have been asked already regarding this circuit on EE SE, but I didn't find an answer to my question.
My question is: what will the output voltage be when subjected to differential input WITHOUT ANY LOAD AT THE OUTPUT? Framed differently, what is the differential gain with no load?
In my understanding, the currents in the collectors of the 2 right transistors will not agree and thus the output impedances at the collectors will come into play. However, I do not know how to calculate this output impedances and how they will affect the output voltage.
Side note: If you think that asking about the output voltage with no load is meaningless than consider a load whose input impedance is comparable or larger to the output impedance looking into the collectors.