What is the best way to find the logic equation for f1 and f2 in the static CMOS circuit below. This circuit has partial pull up network made up of just one PMOS and full pull down network with NMOS transistors for each of boolean inputs
My solution to this yields that f1= ~a.~b ; f2 = a+b. But it is incorrect.
UPDATE: My explanation to my solution(possibly incorrect)
- f1 = 0 when either a =1, b=0 or a=0,b=1 or a=1,b=1
- f2 = 0 when a=0, b=0
- f1 = 1 when f2 = 0 (in step 2)
- f2 = 1 when f1 = 0 (in step 1)
- No combination of a,b will make f1=1,f2=1 or f1=0, f2=0 simulataneously
Therefore we can conclude that f1 and f2 are always complement of each other.
From step 3, f1=1 when f2 = 0 which in turn happens when a=0, b=0. Drawing truth table for f1
a b f1 0 0 1 0 1 0 1 0 0 1 1 0
f1 = ~a.~b
Similarly, from step 4, f2 = 1 when f1=0 which in turn happens when either a =1, b=0 or a=0,b=1 or a=1,b=1. Making the truth table for f2
a b f2 0 0 0 0 1 1 1 0 1 1 1 1
f2 = a+b