I am designing a PCB with High speed video interfaces and I would like to know the way to calculate the maximum tolerance that I can count on while I am length matching all the traces.
When I routed the signals from the DVI driver chip to the connector, there where guidelines all over the internet, but when I am trying to route the bus from the driver chip to the FPGA, it is not that easy to find a guide like that.
So all in all the question is:
I have a bus with a frequency up to 165MHz with 24 signal traces. I would like to know the tolerances that I can count on while I am length matching these traces. I would like also to know how to calculate that.