Sorry, if the question seems silly, but I really need someone to help me understand the below oscillator circuit. How can the oscillation begin, if there are no initial conditions? All analysis shown in textbooks assume an initial condition of either '0' or '1' on input/output. But how does it work in real time? When the IC is powered on, the input side should be floating (high Z state), isn't it? What am I missing here? Also, I read somewhere that this circuit has a nasty habit of altering the duty cycle if operated for long? How is this possible? Any help would be appreciated.
Most oscillators when they are power-up or enabled are arranged to act as linear amplifiers with feedback from the output to input. Circuit noise will then be successively amplified until it saturates. From that point on circuit will oscillate at a frequency dependent upon what timing elements are present in the circuit (inductors, capacitors, circuit delays etc).
In the circuit you have above the feedback from the output of U1A to its input through R1 and R2 will bias that stage in its linear region. The second stage will be biased with the same voltage due to its direct connection to U1A (The biasing will not be correct if there is significant current through R1 and R2 such as would be the case with bipolar 7400 series parts but will be true for CMOS parts).
The gain from the input of U1A to the output of U1B will almost certainly be greater than 1 so that any circuit noise at the input will appear at a magnified level at the output. Power-up transients may also act as the starting stimulus.
This magnified output is fed back through C1 to the input of the circuit to be amplified again. After some number of circulations around the loop the signal will result in saturation and the circuit will stop being a linear amplifier.
At this point it will start oscillating: Imagine that U1B has just transitioned d to a logic 1, this will have couple to the input via C1 bring the input to a logic 1 as well. (ignore R1 for the moment it does not affect the concept of the oscillation).
C1 will then start discharging through R2 to U1A output which is at a logic zero. After some time the input to U1A will fall to the point that U1A is in its linear region its output will start to rise (it was a logic zero) and in turn cause the output of U1B to fall - this fall of U1B output will be coupled to U1A input accelerating the transitioning ending up with the output of U1B being at a logic zero and U1A at a logic 1. C1 now charges up through R2 until the input of U1A gets to the linear region when a transition in the opposite direction occurs.
R1 is necessary to avoid excessive current passing into the ESD diodes present at the input of most ICs - the circuit would still oscillate but the timing would be affected significantly.
It can be difficult to simulate oscillators because circuit simulators such as SPICE are too perfect and do not have any noise or circuit transients to start the oscillation.