Consider the following 6-layer stack-up for a mixed signal board.
1: Top --- analog signals, components ---------------
================================================== (0.20 mm)
2: GND --- return path for analog signals -----------
================================================== (0.36 mm)
3: Pwr --- supply 1, supply 2, supply 3 -------------
================================================== (0.28 mm)
4: Sig --- high-speed digital signals ---------------
================================================== (0.36 mm)
5: GND --- return path for high-speed signals ??? ---
================================================== (0.20 mm)
6: Bot --- control signals --------------------------
Layer 2 and 5 are solid ground planes, without splits in the copper. Layer 3, the power plane is split up into several regions (AVDD, DVDD, VCLK).
What I am trying to achieve, is to keep the layer 2 GND "clean".
My guess is that the high-speed return current should flow trough layer 5. Since this plane is directly underneath the high-speed signal trace, it should offer the lowest impedance return path. Am I right? Does this stack-up make sense at all?