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I'm redesigning a logic circuit. Previously the circuit had a decoder with 4 inputs which made sense because it used like 12 of its outputs. However changing the circuit for what I have now I only use 4 of its outputs. Now I was wondering on how can I get rid of the decoder because I don't feel that it makes that much sense to have this huge decoder and only using like 4 of it's entries.

I attempted to change to a small decoder or a multiplexer but I don't that's the way. Because for example I use the input 0000 but I don't use the input 1000. If I used a multiplexed that had 2 entries (the 2 less significant bits of my original input) it would select the signal I want for 0000 with 1000 and 0100 and 1100... And I don't want that to happen...

Can someone give a tip or a hint on how to proceed? Thanks!

EDIT: I deleted my comment because I find out I was providing wrong information about the codes I'm using

The codes I need are 0001, 0010, 0011 and 0100. So the 4th bit is not used...

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    \$\begingroup\$ You should include a truth table and/or schematic of the original decoder. Not all decoders are equal. There are binary decoders, decimal decoders, 7 segment decoders... Then make a truth table of your new decoder describing what you want it to do. Huge is relative, I can make a 4 bit to one out of 12 decoder which fits in 10 um x 33 um. And that's 0.13um CMOS. Imagine how miniscule it would be in 22 nm CMOS. \$\endgroup\$ – Bimpelrekkie Dec 1 '16 at 15:21
  • \$\begingroup\$ Now I was wondering on how can I get rid of the decoder... You throw it out and design a new one ?!?. My one-out of 12 decoder consists of nothing more than 4 inverters (to make the inverse input signals available) and 12 x 4-input AND gates. So for 4 bit in and 4 out I'd need only 4 x 4-input AND gates. Easy. \$\endgroup\$ – Bimpelrekkie Dec 1 '16 at 15:23
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    \$\begingroup\$ @FakeMoustache, try not to dance on the OP's head quite so hard, it was a perfectly fair question they posted. If they knew how to proceed to truth tables, they'd know how to solve it and not post. Teaching and helping is more friendly than that :-) \$\endgroup\$ – TonyM Dec 1 '16 at 22:13
  • \$\begingroup\$ @TonyM I have no idea why you think that this was not a fair question because it is. But it is unclear what type of decoder the question is about. You guess a 742138 is a solution, nowhere does it say this is for a PCB solution. It only says "redesign". We have no clue about the actual implementation, discrete, on-chip, in an FPGA or gate array ? I want OP to provide all the necessary information. Which most never add anyway so we keep on guessing. Being able to properly tell what you need should also be educated. \$\endgroup\$ – Bimpelrekkie Dec 2 '16 at 7:42
  • \$\begingroup\$ @FakeMoustache, re-read all the text. The OP asked for 'a hint or tip on how to proceed' and you wrote demanding and heavy replies. Imagine you were uncertain and reply to them accordingly. Anyway, let's get back to technical and not into a FB chain :-) \$\endgroup\$ – TonyM Dec 2 '16 at 7:54
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First, look at your "selected" codes. Is there any input bit which is the same for all four selected outputs? If so, you can use a 3:8 decoder such as the 74HC138 or 74HC238, with the common bit applied to the appropriate enable input. That is a single 16-pin package.

In general, though, you should count on 2 or 3 14-pin packages.

Yet another approach is essentially a roll-your-own-logic IC, such as PALs or GALs. Lattice makes a line of GALs which can be programmed with quite cheap programmers, and these are great for miscellaneous collections of glue logic.

ETA - GALs usable for the very small logic functions you seem to be interested in, such as the GAL16V8, are now obsolete, but can still be found on eBay, often for less than 2 bucks. A cheap USB programmer will typically run under 50 bucks.

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  • \$\begingroup\$ OP, good suggestions here. Imagine that the 74138 would do what you'd like, it was my recommendation too. \$\endgroup\$ – TonyM Dec 1 '16 at 22:15

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