Depends on whether you have repetitive sinusoids, or repetitive pulses with fast edges. For sinusoids, we are trained in the limitations of SkinDepth. But fast-edges is the reality for embedded systems; lacking theory, I take measurements of square-waves coupling THROUGH foil, and find 50dB attenuation with 150nanosecond delay....through the foil.
Here are solutions for standard sinusoidal interferers.
With poor control over the magnetic fields, you can reduce the victim's loop areas. Thus opamps with the least possible height above the PCB are best choices. No DIPs allowed. And run GND under the packages, to be right under the piece of metal to which the silicon die is attached.
For those Resistors and Capacitors, surround them with GNDed chunks of copper, to have Eddy Currents develop (are your interferers repetitive or transients?) and thus partially cancel. And have GND pours right under the Rs and Cs, to minimize the loop area; you need to tie the pours very close by to the upper GND, again to minimize the loop areas.
With repetitive magnetic interferers, with partial transmission (Skin Depth not doing much good) you will also get partial REFLECTION. Multiple planes under critical opamps/Rs/Cs will implement multiple magnetic reflections, and provide better shielding of fields approaching from behind the opamps.
With your frequency-of-interest being nearly 1MHz, the Opamp PSRR will be poor.
Thus large capacitors on the VDD+/VDD- pins, with 10_ohm resistors to the central bulk supply are useful. The central power will experience lots of magnetic-field noise, and you want to use LPFs to greatly reduce that repetive noise. 10uF and 10 ohms is 100uS tau, or 1.6KHz F3db, a 50dB reduce in 500KHz trash.