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Here's the high frequency SS for NMOS https://ocw.mit.edu/courses/electrical-engineering-and-computer-science/6-012-microelectronic-devices-and-circuits-fall-2005/lecture-notes/lec11.pdf http://imgur.com/a/HNGaY Stack exchange picture insert wouldn't accept an imgur link

What changes for PMOS? The only problem is the arrow directions for the current sources and I'm not sure if there is a way to figure it out with reasoning instead of redoing the derivatives to get the current sources

My gut instinct is that even though now the source is higher voltage than the drain in PMOS, the final high frequency SS PMOS model ends up similar to the NMOS but I don't have the intuition for why the current source in the high frequency NMOS picture above had current going down from gate to source so I'm not sure if that direction should be reversed for PMOS

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What changes for PMOS?

Just the applied voltage polarities. Source is most positive and gate runs negative with respect to source. Drain becomes more negative with respect to source too.

The only problem is the arrow directions for the current sources

You don't need to change anything if you accept that the gate-source voltage is reversed and therefore the drain current also reverses.

I don't have the intuition for why the current source in the high frequency NMOS picture above had current going down from gate to source

It doesn't: -

enter image description here

The current is from drain to source and, with the gate voltage reversed, the direction of current reverses.

Basically, the model applies to both devices.

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