I was going through timers in pic and found that there are so many timers available in micro controllers. For example a PWM time base is driven by Timer2. My doubt is why there are so many timers? Why cannot be there a single timer for example just timer1 alone for the complete micro controller.

  • 3
    \$\begingroup\$ I would never complain about having too many gold coins in my purse. - - - 30 years ago, people wanted more than one timer ; and they still do. \$\endgroup\$
    – Marla
    Dec 4, 2016 at 15:46
  • \$\begingroup\$ The usual 3 timers for PICs is often annoyingly small. \$\endgroup\$
    – pjc50
    Dec 4, 2016 at 16:11
  • 3
    \$\begingroup\$ Its not clear what drives you to ask this question. What is it about having many timers that you feel is wrong? \$\endgroup\$ Dec 4, 2016 at 17:25

2 Answers 2


Because embedded systems often need to generate time intervals with many different periods or frequencies, for things like:

  • internal timekeeping
  • sampling analog signals
  • generating pulse trains (including PWM)
  • serial communications of various types (UART, SPI, I2C, etc.)

Having dedicated timers for each of these means that the operation is more autonomous, and fewer CPU cycles need to be spent on keeping them going.

  • \$\begingroup\$ But why fewer CPU cycles? \$\endgroup\$
    – rajesh
    Dec 4, 2016 at 15:51
  • \$\begingroup\$ Consider the difference between a software UART and a hardware UART. With the former, the CPU needs to take an interrupt on every bit transition, but with the latter, it only needs to get involved once per byte (or once per DMA block if DMA is available as well). PWM is even more dramatic -- with software PWM, you need CPU cycles to create every pulse edge. With hardware PWM, you set it up once and don't touch it again until the period or duty cycle needs to change. \$\endgroup\$
    – Dave Tweed
    Dec 4, 2016 at 15:53
  • \$\begingroup\$ I continue with rajesh. The attempt to relate the "few cycles" to a software UART was bad (the operator was asking about hardware, not software overhead). -1 for that. \$\endgroup\$ Dec 4, 2016 at 16:11
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    \$\begingroup\$ @DirceuRodriguesJr: Downvote if you want, but the question is asking for the justification for having multiple hardware timers, and most of that justification is related to the balance between putting functionality into hardware vs. software. What exactly are you "agreeing" with? So far rajesh has only asked questions. \$\endgroup\$
    – Dave Tweed
    Dec 4, 2016 at 16:14

Why have just one timer, when you can have more than one?

There are more than one timer for different functions. Some timers uniquely apply to certain peripherals, such as ADC, USART, CCPWM, etc. Timer2 could be used arbitrarily for one function, such as "check sensor every x milliseconds", while Timer1 is also working to "send data to another device every second." With more timers, it greatly expands the designer's ability to use hardware timing (and interrupts, very fast, very repeatable, very periodic) instead of the very poor timing and periodicity of a single main code loop.

Timers are used to process events in a regular timeframe (interval.) For some applications, this may be necessary. For example, if you had an external SAR ADC connected to the PIC, and the maximum sampling rate was x, then you'd have to wait some amount of time before trying to access the device again else it will error. A timer is great for this, as the timing is very precise and regular.

If this ADC code were in a main code loop with pauses, the code timing would be irregular for any branch which executed more code than usual. For example, printing characters every second to a display will take time, and in a main code loop, the next ADC read will be delayed. If timers and interrupts are used, then the timing will be accurate (provided the other code doesn't take longer than the timers allow.)


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