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An FM radio receiver IC RDA5807M has a VCO local oscillator operating on the order of 100 MHz (implied by "low IF" in the datasheet), yet it can get its reference from a 32768 Hz watch crystal. Because of very high PLL multiplication ratio, there ought to be huge phase noise at the output of the VCO (70 dB increase over reference signal).

How did the chip designers get away with it? Phase noise degrades selectivity. FM stations are packed quite tight, not to mention issues whenever tuned station is weak and adjacent interferer is much stronger (actually a realistic situation).

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In some applications there would be huge phase noise but, the synthesizer here does not have to rapidly (or dynamically) set the down-converter frequency - the output from the phase comparator can be highly slugged so that the VCO control voltage is very smooth with barely any ripple.

It's LPF could be 1 Hz or even a bit lower and, it could even speed up when changing stations so as to minimize delay when re-tuning.

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    \$\begingroup\$ Fair remark, no reason they couldn't switch loop filters for non-locked and locked states. Though it has a seek mode which works quite fast and reliable (ie. no interference during retuning). See youtube.com/watch?v=2Mij4fma8zQ Also, is the usual 20log(N) formula for phase noise universal or does it make any assumptions? \$\endgroup\$
    – Michał B.
    Dec 10, 2016 at 16:46
  • \$\begingroup\$ @MichałB. sorry I can't comment on the 20log formula - I'm out of my depth on that - I only use PLLs for moderate values of N with "slow" filtering so I know it isn't a problem. \$\endgroup\$
    – Andy aka
    Dec 10, 2016 at 18:24

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