During development of an integrated circuit it is my understanding that you require a silicon purity of 99.99999999%.

Has this always been the case? In 1971, had the first commercially available microprocessor (Intel 4004, 10 micron process) reached this level of purity?

How has the purity of silicon for electronic purposes increased as the feature size (gate electrode width) decreased?

I've searched online for multiple days with little success. I'm aware of Silicon purification processes and really only seeking a definitive data set on the increase of purity during feature reduction; if any at all?


closed as unclear what you're asking by Andy aka, ThreePhaseEel, Bimpelrekkie, Voltage Spike, Daniel Grillo Dec 14 '16 at 1:44

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    \$\begingroup\$ 9.99999999% or 99.9999999%. I really hope that is a typo \$\endgroup\$ – JonRB Dec 13 '16 at 11:23
  • \$\begingroup\$ That's some low purity silicon ;) \$\endgroup\$ – Corvusoft Dec 13 '16 at 11:29
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    \$\begingroup\$ The 7400N quad NAND gate was the first product in the series, introduced by Texas Instruments in a military grade metal flat package in October 1964. The extremely popular commercial grade plastic DIP followed in the third quarter of 1966. \$\endgroup\$ – Andy aka Dec 13 '16 at 11:38
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    \$\begingroup\$ You are (trying) to link old (large features, impure) to new (small features, very pure) but think about what do you actually need ? For a modern SOI process a high purity of the wafer might not even be needed as the components sit on an isolated layer of SiO2. Without SOI the lowest doping you want to make reliably defines the level of Silicon purity you need. For very low leakage/high voltage devices and processes you might need very shallow doping levels. For the highest speed probably not. \$\endgroup\$ – Bimpelrekkie Dec 13 '16 at 13:07
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    \$\begingroup\$ Why are there close votes with "unclear" as the reason? This question is quite clear. \$\endgroup\$ – pjc50 Dec 13 '16 at 13:25

That's a surprisingly involved question.

So, first of all, the critical thing for commercially available microprocessors is reliable, well-defined transistors and diodes, based on pn-junctions.

Reliable implies that under no circumstances should a semiconductor junction act like a metal. However, all semiconductors do that as soon as you dope them too heavily.

This implies that for commercial semiconductor devices, you need so-called lightly doped semiconductors. Obviously, you want the doping atoms to be the dominant non-Silicon atoms - so every other kind of atom, lest it be really insignificant for the bands involved, must be at least two or three orders of magnitude rarer.

So, what is a lightly-doped semiconductor? Definitions differ, but the takeaway is that the semiconductor must not be degenerate, that is

$$\begin{align} E_c - \mu &\gg k_BT \\ \mu - E_v &\gg k_BT \\ \end{align}$$ must hold.

Here, \$E_c\$ and \$E_v\$ are the energies in the conducting and valence bands, each, which are fixed for a given semiconductor. \$\mu\$ however, is the so-called Fermi-level, which is the level of "occupancy probability equilibrium". In other words, at room temperature, an electron is as likely as not (50%) to be at that level of energy. What the inequalities above demand is that the distance from that level to the band edges is big enough to avoid charges to suddenly flow spontaneously.

\$\mu\$ depends on the doping, since it is a function of the number of charge carriers. Now, I'm not an expert on semiconductor production itself, but I'd assume that with typical doting in the region of \$10^{-15}\text{cm}^{-3}\$, and the molar mass of silicon, you can get far enough to get an idea of what's technically necessary for pure silicon-based bijunction transistors. Then, add some security margin – structures are very small, so a cluster of lets say 3 unwanted atoms might already be pretty much, so the likelihood of that must be suppressed sufficiently below your acceptable yield. It boils down to a size/cost/reliability/yield trade-off and no general answer can be given.

Now, these calculations are based on the assumption that we're working on a silicon wafer with the "natural" silicon lattice – and in reality, modern ICs are based on SOI – silicon stretched on an isolator (SiO2, typically). It's very hard to actually talk about purity in this context.


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