I'm trying to fully understand this opamp configuration but i can't. The signal enters through R19 and i understand that is an inverting configuration and is attenuating the signal with a gain of G=1.2/7.5, but i cannot truly understand what are the functions of both capacitors and the resistor of 24ohm. I think the 24 ohm is a current limiter resistor, but why put in the feedback loop ? And i think the feedback capacitor creates a low pass filter.What would be the cutoff frequency of this filter ? Because in the literature of this circuit its written it has a -3dB frequency of approximately 198kHz
It is a fairly standard ADC driver topology.
Modern ADCs often have switched capacitor architectures that need a fairly large cap local to the input to provide the very fast current pulses that the things draw while performing the conversion, 10nF is a bit larger then you usually see, but not orders of magnitude so.
Now, opamps do not do well directly driving capacitive loads, as it can very easily cause a stability problem, but often you really want good accurate control of the ADC input voltage, so what is a guy to do?
The first thing you do is place a resistor between the opamp and the cap, a few tens of ohms is typical, which isolates the capacitive load from the opamp output, but hurts accuracy, as the feedback is now taken from the wrong side of that resistor (But at least the thing no longer honks)... If you move the feedback tap to the load cap side of the resistor then the effective output impedance goes down, but now you have the stability problem back again. However, the phase shift due to the load is frequency dependent so by placing a cap directly around the opamp then you can ensure that both the gain rolls off with a corner at roughly 1k2 * 820pf, and that at high frequency the feedback phase angle is dominated by the 820pF cap and not the phase lag due to the 10n cap.
At low frequency the gain as seen at ADC3 is -1.2/7.5 with good dc accuracy, there is a -3dB breakpoint at w = Rfb * Cfb, which serves to both limit the bandwidth at the converter and reduce the stability damaging phase lag from the 10nF cap at high frequency.
First look at the DC response. That means the capacitor isn't there, and the 24 Ω resistor doesn't matter since it's inside the feedback loop. That means it's just a inverting amplifier with a gain of (1.2 kΩ)/(7.5 kΩ) = 0.16. Or, you could say it attenuates by 6.25.
For whatever reason, this signal ends up with the 10 nF capacitive load on it. It may be that someone was trying to suppress some noise, slow down edges a little, needed the capacitance for something downstream, etc. The 24 Ω resistor provides the impedance for this capacitor to work against. Note that the rolloff frequency is 660 kHz. Whether that's within the normal range of the signal, we can't tell.
Now we have a problem with the R,C filter in the feedback loop, since it will cause instability. Also, the gain is below 1, so the opamp is probably not stable in this circuit even without the R,C filter. The answer was to add the 820 pF as a compenstation capacitance. Note that its rolloff with the feedback resistance is 160 kHz, so it kicks in well before the pole from the R,C filter can cause trouble. This also supports the idea that the R,C filter at 660 kHz isn't really meant to be a low pass as much as probably to filter some noise, slow down edges a bit, provide lower impedance to ground at higher frequencies, or just because the capacitance was needed on the line.