I am designing a microcontroller-based video system, and I am considering using SDRAM (~100MHz) for external frame buffer memory. (My microcontroller has plenty of I/O for the data and address busses and control lines, and can issue synchronous bus-wide signals at 100 MHz.)
My question is this: Is it possible to continuously stream data from one or more SDRAM chips using "back-to-back" full page burst reads? (A single full page burst read is 256 words, and I am using one word per pixel. In order to output an entire scanline without interruption, I would need a longer read to accommodate horizontal resolutions greater than 256 pixels.)
For example, consider the Alliance AS4C2M32S 2Mx32bit SDRAM. It has four internal banks of 512K words each. I read through the data sheet (more than once), but it is not clear if I can issue a new bank select just before the end of a full page burst read, followed by a new burst read command, so the output data stream will continue without interruption between the end of the first read to the beginning of the next. If I can chain four of these reads together I should be able to read out 1024 words (pixels) in one go; these will be fed directly to a video DAC.
I am aware of the complexity of implementing DRAM controllers, and I am also aware of other RAM types (such as dual-ported or VRAM) which are obsolete. This question is not about that. I also realize that many MCUs also come with built-in GPUs (such as on the Raspberry Pi platform); nevertheless, I intend to do this "from scratch" for personal reasons.
I simply want to know if anyone with low-level SDRAM experience knows if it is possible to seamlessly chain back-to-back full page burst reads for a continuous stream of data. (I hope to fit in refresh operations during blanking intervals...)