# Can vias and traces conduct electricity on PCB surface?

I'm currently designing my first PCB, though when I place a microSD reader on the board I get errors in eagle that the area the reader is over is restricted.

I would have thought this would only apply to components on that side of the board itself, but I get errors when I route traces and vias underneath the reader. So is it possible that traces or vias could conduct electricity through the microSD reader (some bare metal may touch the surface) that might possibly touch the PCB's surface?

• I don't know if this is the case with microSD, but some components have restricted areas that is not strictly related to electricity conduction/isolation. I.E. antennas, some connectors, etc – Wesley Lee Dec 16 '16 at 0:27

If the board does not have solder mask covering the tracks, then any metal or other conductive material placed on the board may contact the tracks and cause a short. Even with solder mask, you should have some additional insulation between conductive material and the board.

In most CAD programs, you can define "keep out" areas when you build a footprint, so that the Design Rules Check function of the PC layout program will warn you if you place tracks where you shouldn't (or even prevent you from placing those tracks.)

It is not good form to run traces under the slot area even if you have a solder-mask layer. You would be relying on the solder-mask to insulate the board from whatever is plugged into the slot. If it is a high-turnover application (frequently plugging and un-plugging), it could wear down the solder-mask and expose the traces. Not recommended.

The other answers are right, a metallic part placed directly on the PCB could short traces, sharp edges could also cut traces. The solder mask is a lousy protection because the part can easily rub through.

But since you are a novice to EAGLE:

In the list of layers, you'll find keepout and restricted layers which are not visible by default.

restricted areas will throw a DRC error when any copper (trace / pad / via) is places in them, as you already experienced. They are usually created as filled polygons and only used when necessary.

keepout areas will throw a DRC error when they overlap with an other keepout area. This is used to indicate the outline of a part, and to prevent you from overlapping parts. The area can also be a bit larger than the part itself to prevent parts from being placed too close to each other.

Of course, you can draw your own polygons in that layers, e.g. to mark areas with too low headroom to place parts. But unfortunately, most parts come without polygons in keepout and you can easily place them in your keepout area :-(