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Im going to build simple 4-bit cpu using only NAND gates and I have a couple of questions. How actually register work in cpu? For example:

  1. PC points to load instruction and CPU should store some value in ACC i.e. 0xE
  2. CPU knows address of ACC, so it should call ACC address on address BUS and 0xE on DATA BUS? Should CPU first clear ACC?
  3. What kind of flip - flop should I use for building such register like ACC ?
  4. Does CPU should have some extra PIN for clearing registers?
  5. Should register be chosen by MUX? If i will build 16 4-bit registers like in INTEL 4004 then CPU should use MUX to choose one?
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closed as too broad by Dmitry Grigoryev, Leon Heller, Rev1.0, tcrosley, laptop2d Dec 19 '16 at 23:10

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Registers are memory inside a processor that aren't part of "main" memory. Registers either have a dedicated hardware function (like the PC), or are tied to data paths inside the processor in special ways that wouldn't be possible for the larger and slower main memory.

The total bits in registers is small, and due to their special functions usually need to be fast. This means they are usually implemented as flip-flops. That makes them fast and versatile, but much larger and more expensive per bit than main memory.

Just about every machine has a program counter (PC). This holds the address of the next instruction to fetch. It incremented to the next instruction after each fetch. Jump instructions are basically writes to this register.

There are also registers for data. The output of the ALU has to go somewhere. This can be a single dedicated register, often referred to as the accumulator, or a small set of registers. For example, the 8 bit PICs have a single accumulator, called "W", but the 16 bit PICs have 16 registers. Each of these registers can source or store data into or from the ALU and other places.

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  • \$\begingroup\$ Thx for your answer but im wondering how physically regsiter store data. CPU put address on the BUS then MUX select register, CPU put data on data BUS and then register should remember the value? What kind of register should it be? \$\endgroup\$ – Bartosz Majkut Dec 19 '16 at 12:05
  • \$\begingroup\$ @Bart: As I said, they are usually implemented as flip-flops. To transfer data from one place to another, some buffer is enabled so that the source data is driven on a bus. Then once the data is stable on that bus, it is clocked into the receiving register. What data sources and sinks are connected to what busses are dependent on the overall architecture chosen, and other design details. There is a lot of flexibility, and many different choices have been made historically. \$\endgroup\$ – Olin Lathrop Dec 19 '16 at 12:12
  • \$\begingroup\$ Ive got problem with simulating 8-bit register. Ive built register using eight D flip - flop. Every flip-flop was made with 5 NAND gates + 2 NAND gates for Preset. My problem is that register doesnt really store input value. When ie D0 change to 1 the Output Q0 change to 1 but when Input change back to 0 output change as well. Do I need some extra latch on output or input? Ive added three-state buffers on inputs and outputs pins and it works good but when I change "Input enabled" pin to 0, buffers outputs change to 0 and register is changing output. \$\endgroup\$ – Bartosz Majkut Dec 21 '16 at 13:04
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To answer your question of how registers actually work in a CPU, it depends on the CPU. I've reverse-engineered several old microprocessors and they use a variety of register circuits.

The Z-80's registers simply store a bit in two cross-coupled inverters. The value is changed by forcing the inverters to a different value with a higher current signal. The bus is connected to all the registers, and the bus control signals select which bus is read or written. The register cell is a 4-transistor SRAM cell.

Inverters storing a bit in Z-80 registers

The 8085's register file is similar to the Z-80, except to read a bit, the signals go through a differential amplifier. This allows the signals from the register to be weaker, allowing the register to be denser, but makes the read circuit more complex.

The 6502's registers use a different circuit. Again two inverters are used, but a pass transistor in the loop allows the circuit to be broken. Another pass transistor (with an opposite signal) is used to store a new value into the inverter. (You can think this as multiplexing either the old value or the new value.) Each 6502 register is implemented slightly differently, since they all have special purposes.

The earlier 4004 and 8008 use a 3-transistor DRAM cell for registers (probably because of Intel's experience building DRAMs). The chips include a refresh counter and amplifiers to constantly refresh the data in registers.

These register designs are different from NAND gate designs, since they use pass transistors rather than Boolean logic, so they aren't what you want to use. For your specific questions:

  1. Selecting registers should be independent of the address bus, which is used for external memory. You probably don't need to clear the accumulator first.

  2. D flip flops will probably be easiest for you to use.

  3. You can have a reset pin to clear the registers. You'll need to clear the PC so you start execution at a predictable address, but you don't need to clear the rest.

  4. You can use a MUX to select a register for reading, but probably a decoder to select a register for writing.

I'd suggest designing (and perhaps building) your CPU from higher-level components than NAND gates. Then when you get it working you can break down components to NAND gates.

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What kind of flip - flop should I use for building such register like ACC ?

D flip-flops should be used for almost everything.

[Should a CPU] have some extra PIN for clearing registers?

Usually the RESET pin on a CPU will clear all internal registers.

Should register be chosen by MUX? If i will build 16 4-bit registers like in INTEL 4004 then CPU should use MUX to choose one?

That's certainly one approach that would work, but others are possible: see Ken Shirriff's blog - Down to the silicon: how the Z80's registers are implemented.

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