This schematic is used to drive a motor with DRV8301. But the datasheet of DRV8301 doesn't show diodes. What is their purpose? VDD is 14.8V (16Vmax). MOSFETS are BSC016N04LS

Schematic with diodes: enter image description here

The datasheet of DRV8301: enter image description here


3 Answers 3


The exact purpose of those Zener diodes cannot be inferred from that schematic alone, without further informations such as MOSFETs part numbers. As others have already said, it is most probably a protection device acting as a clamp.

One problem that those diodes could be intended to prevent, and which has not been mentioned yet, is \$V_{gs}\$ spikes due to quick transitions of \$V_{ds}\$. This is often indicated in literature as high dv/dt rates.

There are fairly big intrinsic capacitances due to the MOSFET structure between source, drain and gate. In particular, \$C_{dg}\$ and \$C_{gs}\$ are relevant for the problem at hand.

If the device is OFF and \$V_{ds}\$ experiences a rapidly varying transient, some of this transient can be coupled to the gate, giving rise to \$V_{gs}\$ spikes that can destroy the device or make it turn ON unexpectedly for a short time.

For further details see this application note from International Rectifier (AN-936): The Do’s and Don’ts of Using MOS-Gated Transistors.

Some excerpts from section 3 (emphasis mine):

Excessive voltage will punch through the gate-source oxide layer and result in permanent damage. This seems obvious enough, but it is not so obvious that transient gate-to-source overvoltages can be generated that are quite unrelated to, and well in excess of, the amplitude of the applied drive signal. The problem is illustrated by reference to Figure 2. (...)

enter image description here

If we assume that the impedance, Z, of the drive source is high, then any positive-going change of voltage applied across the drain and source terminals (caused, for example, by the switching of another device in the circuit) will be reflected as a positive- going voltage transient across the source and the drain terminals, in the approximate ratio of: $$ \frac{1}{1+ \frac{C_{gs}}{C_{dg}}} $$ The above ratio is typically about 1 to 6. This means that a change of drain-to-source voltage of 300V, for example, could produce a voltage transient approaching 50V between the gate and source terminals. In practice this “aiming” voltage will not appear on the gate if the dv/dt is positive because the MOS-gated device goes in conduction at approximately Vgs = 4V, thereby clamping the dv/dt at the expense of a current transient and increased power dissipation. However, a negative-going dv/dt will not be clamped. This calculation is based upon the worst case assumption that the transient impedance of the drive circuit is high by comparison with the gate-to-source capacitance of the device. This situation can, in fact, be quite easily approximated if the gate drive circuit contains inductance—for example the leakage inductance of an isolating drive transformer. This inductance exhibits a high impedance for short transients, and effectively decouples the gate from its drive circuit for the duration of the transient. The negative-going gate-to-source voltage transient produced under the above circumstances may exceed the gate voltage rating of the device, causing permanent damage. It is, of course, true that since the applied drain transient results in a voltage at the gate which tends to turn the device ON, the overall effect is to an extent self-limiting so far as the gate voltage transient is concerned. Whether this self-limiting action will prevent the voltage transient at the gate from exceeding the gate-source voltage rating of the device depends upon the impedance of the external circuit. Spurious turn-on is of itself undesirable, of course, though in practical terms one may grudgingly be able to accept this circuit operating imperfection, provided the safe operating area of the device is not violated.

It should be remembered that a collapse of voltage across the device (i.e., a negative-going dv/dt) will produce a transient negative voltage spike across the gate-source terminals. In this case, of course, there will be no tendency for the device to turn ON, and hence no tendency for the effect to be self-limiting. A zener diode connected to clamp positive transients will automatically clamp negative-going transients, limiting them to the forward conduction voltage drop of the zener.

Since you ruled out some other reasons given in other answers (ESD protection, protection from spikes coming from the gate driver), I think that the most likely reason is to prevent high dv/dt-induced spikes to damage the device, especially because the load (motor) is highly inductive and could well generate transients with steep edges.

  • \$\begingroup\$ A very good point, however simple inspection tells you that High V(DS) spikes clearly could not ever be a problem on the high side switches since they are directly VDD connected. And while negative transitions could certainly occur on the source side (and may be magnetically driven), since C(DS) dominates it limits the magnitude to VDD. Any further then it would be clipped by the lower intrinsic diodes. So in a bridge configuration I certainly discounted this reason. For the lower switches your point is valid once VDD is more than V(GS) breakover for the lower switches. \$\endgroup\$ Dec 25, 2016 at 23:23
  • \$\begingroup\$ @Jack do you think the diodes are necessary. Maybe it will be better to assemble and test the board, check it with an oscilloscope? \$\endgroup\$ Dec 26, 2016 at 2:56
  • \$\begingroup\$ @RomanSimonyan. The diodes certainly have some validity on the lower side switches, but it all depends on the VDD supply you are using. I can't find the V(GS) maximum in the data sheet, so it's not clear what level of feedthrough pulse might occur or would be tolerable. If it turns out the lower side switches are the only ones needing protection, that could be provided by a diode rather than a Zener. \$\endgroup\$ Dec 26, 2016 at 3:13
  • \$\begingroup\$ VDD is 14.8V (16Vmax). MOSFETS are BSC016N04LS \$\endgroup\$ Dec 26, 2016 at 5:32
  • \$\begingroup\$ @JackCreasey You definitely have a point. Maybe the designer adopted a "belt and braces" approach and didn't spend too much time optimizing the BOM. \$\endgroup\$ Dec 26, 2016 at 17:35

The Zener diodes are simply Gate protection devices. They limit the positive voltage peak to 17 V and the negative to approximately 700 mV.

They are typically placed in application builds to provide static protection. For example if the schematic you showed was part of a small plug in driver board and the signals GX_X were connected off board; this would prevent static damage due to handling.

  • \$\begingroup\$ The board is an one piece ESC, so mcu, driver and mosfets are on same board. So, nothing is disconnected here. What do you think? \$\endgroup\$ Dec 25, 2016 at 17:08
  • \$\begingroup\$ @RomanSimonyan. Hard to say without seeing the whole schematic, but the devices only serve to protect against static. I imagine your ESC is small and can be handled, and might be sensitive to static when unpowered. The designers may simply be responding to a failure mode that was experienced in the field...ie customers zapping the board. \$\endgroup\$ Dec 25, 2016 at 19:01

The Zener diodes seem to be for voltage regulation, clamping the voltage level at the MOSFET'S gate.

  • \$\begingroup\$ Why it may be needed? The driver drives the gates with voltages required. May there be spikes on the line from the driver to the mosfet's gate? \$\endgroup\$ Dec 25, 2016 at 16:57

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