I'm currently building an optical imaging system and have run into some difficulty. The optical source is a Ti-sapphire laser which outputs pulses at 80 MHz and I'm using a photomultipler tube as a detector. I would like to trigger my sampling based on every third pulse from the Ti-sapphire (in other words I would like to sample at 80/3 MHz). I have already setup a fast photodiode that can detect each pulse. Is there a way I can easily pick off every third pulse?

Thanks for any help.


If you have a photodiode detector that can output a digital 1 or 0 on every pulse then creating a trigger that outputs on every 3rd pulse is not that hard.

Make a state machine that essentially counts to 3 and then resets.

Let there be a clock signal that is the output of your photodiode detector.
Let there be a 2 bit state variable that counts the pulses (lets call it C).
Let there be a trigger output. Lets call it T.

An HDL description for the state machine would look like...

if rising_edge(clock) then if C = "00" then C <= "01"; elsif C = "01" then C <= "10"; else C <= "00"; end if; T <= C = 00;
You could of course synthesize that HDL code on a CPLD directly. Alternatively you could use a few 74-series logic chips to implement the logic.

C(0) <= C(0) NOR C(1)
C(1) <= (C(0) NOR C(0)) NOR C(1)

T = C(0) NOR C(1)

So you would need a quad NOR gate, and two D-Flip-Flops.

Also, as some have suggested, you could use the pulse detector to clock a 3 stage shift register arranged in a circle. Your trigger would be the output of one of the three register stages.

The shift register would need to be preloaded with the value "100". After the first pulse the value would shift to "010", after the second "001", and then after the third it would go back to "100". So you would have a 1 on your trigger every third pulse.

  • 1
    \$\begingroup\$ That's "elsif" not "else if" and you need another "then" (but a counter would be simpler) \$\endgroup\$ – Brian Drummond Dec 25 '16 at 21:24
  • 2
    \$\begingroup\$ Instead of nands and nors, you could also preload a three bit cyclic shift register with 0 0 1 and use the pulses to clock it, and read out the highest bit. \$\endgroup\$ – Marcus Müller Dec 25 '16 at 23:51
  • \$\begingroup\$ @Marcus Müller I agree, the shift register could also work, and could potentially support higher clock rates. \$\endgroup\$ – user4574 Dec 26 '16 at 3:09
  • \$\begingroup\$ @Brian Drummond Thanks for the syntax checking. I fixed it. \$\endgroup\$ – user4574 Dec 26 '16 at 3:11
  • \$\begingroup\$ Hi, I wouldn't recommend a state machine to anybody to do a fixed sequence, particularly a sequence so tiny. As others have suggested, a ring counter or a binary counter is simpler and therefore faster and better. An FSM may reduce to similar here but it's not a good road to start from \$\endgroup\$ – TonyM Dec 26 '16 at 10:06

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.