I did a little test on a 74HC595 shift register as follows:

I tied OE (pin 13) to ground to enable outputs. I tied MR (pin 10) to VCC (+5VDC/logic high) to prevent a reset. I connected SCK, RCK, and DS (pins 14, 11, and 12) to individual I/O lines of an uninitialized AT89C2051 microcontroller and connected 10K pull-up resistors to each line. I connected the lowest bit output (pin 15) to a LED through a 1K resistor to see what's going on.

The AT89C2051 doesn't ground any I/O lines when it is initialized with no code, and even with an accidental reset on the AT89C2051, the I/O lines would remain unchanged.

I also used several 2.2uF decoupling capacitors.

Once I powered it up, the LED immediately turned on. I tested every output pin of the 74HC595 and they all were logic high instead of logic low.

Why does this happen?

I have verified that the 74HC595 works by replacing the AT89C2051 with an empty 20 pin socket and applying logic levels to the appropriate pins but I don't understand why it (74HC595) would start up with logic high outputs instead of logic low.

  • \$\begingroup\$ Most microcontrollers (like AT89C2051) power up with IO pins in high-Z state. If you want the same behavior from the '595, then don't ground OE. Remember that the '595 is a few dozen transistors. A uC has 1000's, and can spare a few for a reset controller to make sure all registers start out in a defined initial state. \$\endgroup\$ – The Photon Dec 28 '16 at 23:28

Without looking at the detailed internal structure of the flip flops in the 74HC595 I can conclude that there is something in the structure of each flip flop that gives it a bias to powering up in the logic 1 out condition. This could be such things as relative fet sizes or capacitance values within the flip flop. You should not rely on this. This is what the MR is for. Wire up the MR to a reset line or a capacitor to ground with a pull up resistor if a known power up condition is important to you.

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    \$\begingroup\$ Or just that particular sample. Maybe the PMOS came out fast and the NMOS slow on that particular fab run, or vice versa. Another sample, or a 74HC595 from a different vendor, might power up to all 0's, or some mix of 1's and 0's. \$\endgroup\$ – The Photon Dec 28 '16 at 23:25
  • \$\begingroup\$ Which is exactly why you should not rely on it. \$\endgroup\$ – RoyC Dec 28 '16 at 23:26
  • \$\begingroup\$ not disputing your answer, expanding on it for OP's benefit. \$\endgroup\$ – The Photon Dec 28 '16 at 23:29
  • \$\begingroup\$ No problem just reinforcing the point \$\endgroup\$ – RoyC Dec 28 '16 at 23:31