# Is 74LS139 a DeMUX? If yes then how can I give it input and select lines?

I am trying to learn DEMUX.

So, I have a 4 Channel DeMUX Diagram:

From this diagram we can clearly see that a DEMUX needs 2 Select Lines and 1 Input to give 4 output lines.

After that I have taken a look at the datasheet of 1:4 DeMUX IC 74LS139, which describes a diagram as shown below. Here is the link to take a look at datasheet.

In second image we can clearly see that it has two input lines A0a and A1a on left DeMUX and A0b and A1b on right DeMUX. There is no select lines. Also we cannot see a logical connection between any input lines of Left and Right DeMUX.

Can someone explain me, how to use this IC as DeMUX?

• What, exactly, do you think the function of pins 1 and 15 are? Dec 29 '16 at 13:01
• @WhatRoughBeast I thought It was a switch to turn ON/OFF the DeMUX just like MUX. Dec 29 '16 at 13:05

This chip is a dual 2->4 demux, not a 3->8 demux, that's why there are no connections between the two halves of the chips internals.

The A lines are the address (=select) lines. The E (enable) line can be used as (active low) input. The outputs are active low, hence the outputs that are not addressed are high.

• Thanks for simplifying the answer. I just better understood the concept from you than from Tom's answer. So I will accept it. Dec 29 '16 at 13:02

In your first paragraph you say that a demux requires:

2 Select Lines and 1 Input to give 4 output lines

In the logic diagram of the 74LS139, you have exactly that. Two address (select) inputs A0a and A1a, one input Ea, and four output lines O0a, O1a, O2a and O3a.

In fact the image you show from the datasheet explains this in the "Pin Names" section just below the connection diagram.

• Thanks for the answer. Before taking a look at demux, I actually took a look at mux's datasheet, where I saw an Enable input, to enable or disable mux. So, I compared it to Demux's Enable input. So, I was confused. Your explanation resolved my confusion. Thanks again. Dec 29 '16 at 13:00

The chip is Dual 2->4 demux which means that you have two demux in one circuit so you can have two separate Multiplexed input from A0a and A1a and For enabling this part you can use Ea and similarly for Other part use B0b and B1b as input and Eb to enable it.

A0a , A1a ,Ea -> O0a, O1a, O2a and O3a.
B0a , B0b ,Eb -> O0b, O1b, O2b and O3b.