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I was reading this and couldn't figure out at what point and how are the capacitors getting discharged?

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  • \$\begingroup\$ They get discharged through one transistor and charged through the other. \$\endgroup\$ – Ignacio Vazquez-Abrams Dec 30 '16 at 22:20
  • \$\begingroup\$ @IgnacioVazquez-Abrams If TR1 is ON and TR2 is OFF(just starting the circuit), will C2 be charged to +9V as the collector of TR2 will have the same potential? I am unable to see it here. \$\endgroup\$ – piepi Dec 30 '16 at 22:28
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First some background.

Bipolar Junction Transistors (BJTs) are devices in which the base-emitted current, that is current flowing between base and emitter, controls the collector-emitter current. In other words when a current flows through the base of the transistor, a typically larger current flows through the collector.

While the current is variable, the voltage at the base of the transistor remains fairly constant when forward biased regardless (*) of the current, and for a silicon device is typically in the region of 0.7V.


Now lets look at the multivibrator circuit.

Lets start by assuming that Q2 is off and Q1 is on. In this configuration Out2 is pulled up to 9V, and the base of Q1 is at 0.7V (so there is 8.3V across C2). Out1 is pulled down to 0V by Q1, and C1 is charged up to 8.3V.

In this configuration the base of Q1 is being driven through R3, which allows C1 to discharge up through R2 and Q1's collector.

Step 1

As it discharges, it will reach 0V, and then begin to charge up in the opposite polarity until the voltage at the base of Q2 eventually reaches 0.7V. At this point Q2 is starting to turn on as the current flows into the base.

Step 2

The moment Q2 turns on, its collector is pulled down to 0V. However C2 is still charged up to 8.3V as it hasn't has a chance to discharge. Because the right hand plate has been pulled down to 0V, the left hand plate must be pulled to 8.3V below this, meaning the base of Q1 is now pulled down to -8.3V which turns it off.

Step 3

Now what happens in there is no current flowing into the base of Q1, but there is a pull-up resistor to +9V - through R3. It is then through R3 that C2 begins to discharge until it reaches 0V. Once it reaches 0V, it now begins to charge again - remember it is pulled up to +9V. At the same time, C1 is now being charged up through R1 and the base of Q2 towards +9V because Q1 is now off.

Having reached 0V, C2 charges until the base of Q1 hits +0.7V again.

Step 4

At this point Q1 switches on, which immediately pushes the base of Q2 down to -8.3V because of C1, switching it off. The cycle repeats.


Basically the capacitors are charged and discharged by the two resistors. When a transistor is off, the corresponding capacitor charges up through the pull-up resistor on the collector. When the transistor switches on, it generates a negative voltage on the base side of the corresponding capacitor, which allows it to be discharged through the pull-up resistor on the base.

There is a nice simulation of the Astable Multivibrator in the examples of the Falstad Java Circuit Simulator.


(*) Technically it is variable, but only over a small range, similar to a diodes forward voltage

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  • \$\begingroup\$ I am right here. \$\endgroup\$ – piepi Dec 30 '16 at 22:45
  • \$\begingroup\$ Out2 is pulled up to 9V, Does this mean that the right plate of C2 will have a +9V potential and left plate a +0.7v potential? I am confused about the way capacitor changes polarity, like when doing hard OFF to a transistor. \$\endgroup\$ – piepi Dec 30 '16 at 22:55
  • \$\begingroup\$ Out2 is connected to the "right plate" of C2. It would be easier to explain with numbers on the capacitor plates to help identify them. I'll try and draw up a diagram. In the mean time, this may help:falstad.com/circuit/e-multivib-a.html. In that simulation, green is +ve, red is -ve. \$\endgroup\$ – Tom Carpenter Dec 30 '16 at 22:57
  • \$\begingroup\$ @piepi added the diagrams. \$\endgroup\$ – Tom Carpenter Dec 31 '16 at 14:03
  • \$\begingroup\$ Thanks. Now what happens in there is no current flowing into the base of Q1, but there is a pull-up resistor to +9V - through R3, what is the meaning of "pull-up resistor" here? I mean, I understand that the PD is rising to +0V from -8.3V then it will got upto +0.7V. \$\endgroup\$ – piepi Dec 31 '16 at 18:34
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Since the transistors invert from base to collector and the two form a positive feedback loop with gain > 1.

When TR2 transistor is ON ( Active low) TR1 is OFF and a delay time formed by RC pullup delay with R3C2 until Vbe1 reaches 0.65V then TR1 turns ON and C1 turns OFF TR2 and the process repeats thru the complementary parts.

This clock is called ASTABLE meaning not stable and constantly flip-flops. The delays of R3C2 and R1C2 rising from Vce(sat)~0.1V to 0.65V (Vbe(sat) which is less swing than that of 60% or so of V+ where RC=T is defined.

The easier version uses a Schmitt trigger 'HC14

schematic

simulate this circuit – Schematic created using CircuitLab

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  • \$\begingroup\$ I have a little issue with charging and discharging of capacitors. \$\endgroup\$ – piepi Dec 30 '16 at 23:37
  • \$\begingroup\$ little how ? . . . \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 Dec 30 '16 at 23:38
  • \$\begingroup\$ Wave mouse over scope traces to see corresponding Node for V or I tinyurl.com/hopkt7d \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 Dec 30 '16 at 23:48
  • \$\begingroup\$ In the initial state, capacitors are discharged. TR1 turns ON. Left and right plates of C1 are at 0V, thus TR2 being off. Left plate of C2 is connected to TR1 base which is 0.7V, right plate has 0V. Now C2's right plate charges quickly to +9V via R4, and C1 charges slowly to 0.7V via R2. What will be PD across C2? +9V or +8.3V? \$\endgroup\$ – piepi Dec 30 '16 at 23:54
  • \$\begingroup\$ Actually only 3.3V due to R3 pulled down by C2. Vc2 reaches max of 3.9V tinyurl.com/hu9na77 \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 Dec 31 '16 at 0:10
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The basic principle is that you can't instantly change the voltage across the plates of a capacitor.

Like many oscillators this astable requires a slight imbalance in component values. Due to this imbalance when power is applied one of the transistors will turn on faster than the other. Let's say this is Q1.

Initially both capacitors will have 0V across their plates.

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Diagram 1. Initially both plates of C1 will be 0V. C2 would like to have both plates at 9V but be the base-emitter junction clamps the base of Q1 at 0.7V (approx.). Which means Q1 is ON and Q2 is OFF.

Diagram 2. The plate of C1 is then charged up through R2 (it hopes to get to 9v) until it reaches 0.7V.

Diagram 3. At this point Q2 is turned ON. The voltage at the collector of Q2 drops rapidly (from 9V to 0V). This falling edge pulls the base of Q1 to -8.3V (+0.7 - 9V = -8.3V). At the same time the collector of Q1 rises from 0V to +9V (rising edge). C1 would like the other plate to rise from 0.7V to 9.7V (a 9V step) but it is clamped by the base-emitter of Q2 to 0.7V. This positive feedback has the effect of increasing the switching action of Q2 by momentarily over driving the base. On a practical note:

R3 now tries to charge C2 to a final voltage of 9V from - 8.3V.

Diagram 4. When the base of Q1 reaches 0.7V it is turned ON and the voltage at its collector falls from 9V to 0V causing the voltage across C1 to go from 0.7V to -8.3V. This turns OFF Q2 causing its collector voltage to rise from 0V to 9V. The other plate of C2 would like to rise to 9.7V but is clamped by Q1 base-emitter. This gives an extra kick of current into the base of Q1 turning it on fully.

From this point on the transistors are alternately turned on and off (4-3-4-3-4 and so on).

On a practical note:

The basic principle of the capacitor is never violated in the astable, the charging and discharging happens very rapidly and we tend to ignore the little edge glitches at the bases as they are not part of the astable timing.

The base-emitter junctions of a BJT have a fairly low breakdown voltage in the order of about 6V. This means (for an NPN type) that it will breakdown if the base is taken more than 6V negative to the emitter and acts like a 6V zener diode. This modifies the way the astable functions (although it still works) so at higher operating voltages (e.g. 9V) we don't always get the negative value we think we should get.

(1) It runs a little bit faster than the calculation of RC timings would suggest (not usually a problem).

(2) Eventually the emitter of the transistors will be damaged by pitting and they may stop working.

By putting diodes in series with the bases this effect can be easily eliminated.

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