I have a circuit that makes uses of a decoder to command the latch line of 8 latches. To avoid spurious latching that could occur in transitions, I disable the decoder output while I change the input address.

I'd like (in order to work faster) to get rid of this mechanism. My input addresses are just counting (000 001 010 011 ... 111), so I was wondering if there was an IC that could fit my need, something like

  • 8 output lines, with at most one line i reading 1

  • 1 clock line which would do i = (i + 1) % 8 on an edge

  • 1 reset line which would do i = 0 on an edge

Something like a synchronous counter + decoder without the transitional problem described above in one chip.

Does it exists ?

  • \$\begingroup\$ Look at CD4017 & CD4022 as a starting point and comment. Datasheet here \$\endgroup\$
    – Russell McMahon
    Mar 9, 2012 at 18:31

1 Answer 1


Johnson counter, connect the reset to one output to stop it counting the full range.
For instance 4017

  • \$\begingroup\$ This one is exactly what I'm looking for, isn't it ? be.farnell.com/texas-instruments/cd4022be/… \$\endgroup\$
    – Julien
    Mar 9, 2012 at 19:12
  • \$\begingroup\$ Yeah, the main difference between 4017 and 4022 is the number of outputs. Since you specified 8, the 4022 is an appropriate choice. If the 4017 is more easily sourced, it can be used as well. \$\endgroup\$
    – Tevo D
    Mar 10, 2012 at 14:17

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