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I'm playing around with a diode as AM demodulator and have stumbled upon a phenomenon that seems logical but I can't reproduce it in LTSpice. My setup is the following:

schematic

simulate this circuit – Schematic created using CircuitLab

U_in is a sine wave with amplitude of about 0.5V and a DC-Offset of 2.5V. $$ U_{in} = 2.5V + 0.5V * sin(wt) $$

Now when I measure the voltage after the decoupling capacitor, which is supposed to strip the DC bias, I get a sine wave with \$ U_{max} = 200 mV \$ and \$ U_{min} = -800 mV \$.

So far, so good. My interpretation of this is that the positive half wave is passed through the diode above the forward voltage of about 200 mV while the negative half wave is blocked by the diode and generates a negative DC offset on the right side of the capacitor.

I know that I can align the signal around 0V by adding a DC return path after the decoupling cap.

The question is why I cannot reproduce this behaviour in LTSpice. Even when using a detailed capacitor model with ESR and parallel resistance, adding the scope input (1Meg, 15p, 10:1) to the simulation and trying different diodes, the result will always be a sine wave that is offset by at most 10 mV. If it wasn't for the measuring utility, I'd say there wasn't any DC bias at all. Am I missing something? Is there some parasitic parameter I'm not taking into account?

Here is a screenshot of my simulation, the green trace is the (wrong) simulation, the blue trace is what I see on the real world scope:

enter image description here

Any help would be greatly appreciated!

Kind Regards

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  • \$\begingroup\$ Are you sure that your Spice has a valid model for that particular diode? \$\endgroup\$ – Dave Tweed Jan 2 '17 at 16:59
  • \$\begingroup\$ Try increasing the amplitude of your sine wave. Maybe the diode isn't conducting in LTspice. It tried the simplest model in LTspice with a larger amplitude and it seemed to work. \$\endgroup\$ – Ken Shirriff Jan 2 '17 at 16:59
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    \$\begingroup\$ Thanks for the ideas! The diode didn't seem to be the problem. It does work with a higher amplitude sine wave because that charges the capacitor quicker but the underlying problem was just me not simulating for long enough. \$\endgroup\$ – Felix S Jan 2 '17 at 18:43
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You should know that, because of the reactive elements, there can be some transients that can confuse if left only for a short time. In this case, you can run the simulation with .tran 500u uic (to be sure it starts everything from zero), and make that end resistance 100, as in the original picture, otherwise you'll have to wait even longer. I didn't have your diode, so I just used the ol' BAT54, but that shouldn't make too much of a difference in this case.

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  • \$\begingroup\$ Thanks a lot - I'm pretty new to spice and don't know about all the options. Of course, now that you explained it, it's logical that the capacitor will need its time to actually build up the bias. But can you explain what the "uic" in the command does? \$\endgroup\$ – Felix S Jan 2 '17 at 18:37
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    \$\begingroup\$ It treats the whole circuit as if it just starts, everything is zero, unless specified. Without it, it assumes it has been running since the beginning of time so all the reactive elements had time to settle and then it tries to calculate the operating point. But it doesn't always succeed, so sometimes it's better to use uic and just "wait for it". In this case, with or without uic, the sine at the input still starts with a zero bias which needs to "adjust" itself after the series capacitor to some -0.3V, so, with or without uic, you still have to wait for transients to settle. \$\endgroup\$ – a concerned citizen Jan 3 '17 at 7:59

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