# Why does the current still flow through the collector eventhough the transistor circuit has no Vcc

I came across a tutorial where I thought the above BJT NPN circuit is wrong because of the conclusions made.

But when I simulated this circuit I found out the conclusions were true.

I was completely puzzled and seems like I have some fundamental misconception about transistor behavior.

The above circuit is not powered. There is no Vcc. There is an input voltage Vin which is increased from zero to 1V.

Below is the plot of the output voltage Vout with respect to Vin:

And here below plot is the current through the load I(Rload) and the collector current Ic with respect to Vin.

Question:

My confusion is how come any current forms and flows through collector and Rload when there is no potential difference between the transistor's collector and emitter terminals.

According to the plot it seems KCL is satisfied because I(Rload) + Ic = 0.

But what I don't understand how does the current forms and flows this way.

If someone would ask me I would say: "The current will flow from the base to the emitter hence to the ground. There will be no current through the load and there Vout will be zero."

I'm completely puzzled with this circuit. Obviously something is wrong in my view. Why does the current loop that way?

• Cuz there's resistance between B and E? Commented Jan 4, 2017 at 0:27
• No potential difference with what's essentially a diode?? Commented Jan 4, 2017 at 0:32
• Right now I'm looking at TTL gates, where the input transistor does current steering. The base current can be steered out the emitter or "backwards" out the collector. I think the same thing is happening in your case. If you think of the transistor as just two diodes, you'd get some current going out the collector, which is what you are seeing. If you disconnect the emitter, you'll see all the current going that way. Commented Jan 4, 2017 at 0:32
• I mean no external Vcc applied to collector terminal. Commented Jan 4, 2017 at 0:33
• If Collector is grounded by R and Base is +/-1Vp sine the Base can be negative making Vcb forward biased just using the junction as a diode. Commented Jan 4, 2017 at 0:44

## 3 Answers

It's to do with the structure of a BJT transistor. Lets look at an NPN:

You have a collector region made of N-type semiconductor, a base of P-type, and an emitter of N-type. I'm not going to go into detail as it is beyond the scope of the question, but lets suffice it with a question - don't the collector and emitter look similar?

What you have done is connect the emitter to ground, and the collector to ground via a resistor. You have then applied a voltage to the base.

Normally what you would expect with a voltage on the base is for current to flow from the base to the emitter - it's basically a diode with the base being the anode and the emitter being the cathode. If the voltage at the cathode is higher than the base, this flow of current through the base-emitter junction will cause current to flow from collector to emitter.

However in your case, the collector is not at a higher potential than the base, it is at a lower potential. This is where my question comes in - much like the base-emitter junction, the base-collector junction is also a P-N junction, which is also a diode. Again the base is the anode, but this time the collector is the cathode. That means when you apply a higher voltage on the base than on the cathode, a current will flow from the base through the cathode.

You now have current flowing from the base to the cathode, through the resistor to ground, thus the mysterious current flow is identified.

To clarify further, here is your circuit if we consider the P-N junctions as diodes (*):

simulate this circuit – Schematic created using CircuitLab

You can see how the current can now flow through both the Base-Emitter diode as well as the Base-Collector diode.

In terms of why your current chart is showing the collector current as being negative, this is almost certainly down to the way you have probed the wire in your simulation.

The simulation probe will be set up so that that current flow into the collector is considered "positive". Additionally the second probe will be set up so current flow through the resistor from top to bottom is considered "positive".

However in this case current is flowing out of the collector ("negative" from probes point of view) and into the resistor ("positive" from the second probes point of view). As a result there is a discrepancy in the sign.

Basically it is like having two ammeters in series, but one wired up backwards. They will show equal but opposite readings.

Bonus Info

Now the Base-Collector current will be much lower than the Base-Emitter current, partly because you have the series resistor from collector to ground which will drop some voltage and so limit the current (much like putting a resistor in series with an LED), but also partly because the NPN structure is more complex.

The emitter is doped more heavily than the collector which means that the B-E junction will actually have a much lower forward voltage drop than the B-C junction. As a result, even without the resistor the B-C current will be considerably less than the B-E current.

In fact you can use a BJT transistor in reverse (swapping C and B), but the performance will be massively degraded.

(*) The diode view doesn't entirely represent an NPN transistor. If you stick two diodes together like that you will not end up with an NPN transistor because of the metal leads of the diode in between amongst other things. However it does accurately depict the effect you are seeing.

• I wanted to make my own answer, but I think you should add in how diodes create a resistance. Commented Jan 4, 2017 at 0:44
• @Tom Carpenter Your answer made sense. But according to this model the collector current and the load current would be in the same direction. However Ic and Iload are flowing in opposite directions and their sum is zero according to KCL. How can we explain this? Commented Jan 4, 2017 at 0:54
• @user16307 you haven't said how you are measuring current in the simulation. You may find that the probes are assuming a +ve current flows into the collector, and a +ve current flows from top to bottom in the resistor. As a result you end up with an artificial negative sign because the current is flowing out of the collector not into it. Commented Jan 4, 2017 at 0:58
• @TomCarpenter You are right. When I rotated the resistor upside down in the simulation I got the same current through both. Commented Jan 4, 2017 at 1:02
• @TomCarpenter. Great answer, well explained. Commented Jan 4, 2017 at 1:06

This is intended as a supplement to Tom's comprehensive answer, and is answered by taking a 'step back'. It's an answer about models.

A transistor is a complicated object. For many purposes, it can be simplified by replacing it with a model, which captures some, but not all, of its behaviour.

For instance, when measuring a transistor with the 'diode test' function of a DMM, the 'two diodes' model explains the measurements. But it doesn't tell you where gain comes from. The model is too simple for that.

When biassing a transistor 'normally', for instance to produce a common emitter amplifier, the 'current controlled current source' model captures much more of the behaviour, lets you calculate bias currents and amplification factors. But it's too simple and abstract to explain what happens in the OP's question.

When people use models, it's normally to capture the simplest behaviour for their purpose, and no more. As such, we can normally find corner cases which illustrate the shortcomings of any model. We then need to find a more complete model, knuckle down and analyse the complete complicated object, or decide we don't need the extra precision and find a way to work with the model's approximation (all three are done in different circumstances).

I was always amused by the model of people that my boss used when working out how many people to assign to any given engineering project, he'd replace people by 'tins of luncheon meat', which would capture the indivisibility, some of the biology, and (maybe my post-hoc, maybe his sub-text) the inability to know what you were going to get until you opened the tin and were probably disappointed. Let's see, we have a budget of 2million over 4 years, so we can afford to put 5 tins of luncheon meat on it! Even though the model somewhat over-simplifies the details, I don't recall him being any less successful with resource planning than any other project manager.

Just adding a couple of points to Tom Carpenter's excellent answer

The above circuit is not powered.

Vin is a power source.

...how come any current forms and flows through collector and Rload when there is no potential difference between the transistor's collector and emitter?

Vout is the potential difference between the transistor's collector and its emitter. Your plots clearly show that it is not zero.

Furthermore, your plots show current through Rload. There can never be current through a resistor without a potential difference between its terminals. That's Ohm's Law.