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I'm building a circuit that uses multiple chips. All of them require a capacitor to be connected in parallel to the VCC line (as seen in the datasheets). Since capacitors are used to reduce voltage fluctuations, and all the chips are drawing upon the same VCC, can I just use one big capacitor for all the chips? If yes, do I just add the capacitance of the small ones together use that value for the big one?

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  • \$\begingroup\$ This is probably a dupe of about a dozen other questions, but it keeps being asked so I'll leave it for know and see if we can't lick this thing once and for all. Or, if anyone feels otherwise, we can merge it with another question. \$\endgroup\$ – Kevin Vermeer Mar 12 '12 at 5:59
  • \$\begingroup\$ The tag decoupling-capacitor provides a great answer to this question :) \$\endgroup\$ – tyblu Mar 12 '12 at 6:40
  • \$\begingroup\$ While not a exact answer to your question, I wrote a lengthy discussion of decoupling caps and layout issues here: electronics.stackexchange.com/a/15143/4512. \$\endgroup\$ – Olin Lathrop Mar 12 '12 at 12:31
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  • One capacitor per power connected pin is a good idea when possible.

  • Combining values is not the ideal way of calculating needs.


The roles of the decoupling capacitors are

  • (1) Stop local peak load effects radiating to other components:
    Provide an energy sink adjacent to the IC so that it may draw energy peaks from them rather than drawing the required energy from further away and thereby causing a substantial supply voltage fluctuation which may adversely affect the operation of other ICs and other circuit elements.

  • (2) Stop remote peak load affects affecting local operation:
    Provide an energy sink adjacent to the IC so that it may supply energy to the bus when some other IC etc draws energy peaks to stop the resultant voltage dip from affecting the IC's operation.

  • (3) Stop current pulses and voltage spikes caused by switching inside ICs from propagating across the board and causing EMC (electromagnetic compatibility) issues.

  • (4) All of these - connect a pin to the eternal now of a signal-grounded zero impedance noise free nirvana plane [tm] where noise signal sources cannot propagate noise, noise sensitive sinks don't see noise, adjacnet pins are blissfully unaware of the other's existence - OR the nearest thing to it in practice = a ground plane.

(1) & (3) require the capacitor adjacent to the IC to keep noise off the system bus.

(2) Requires that the capacitor is electrically closer to the IC that may be affected that the pulse generating IC is. You COULD try to second guess the key locations needed to place these, but, why bother unless room or budget are very low and volume produced are astronomical.

(4) Is the best practice implementation of these in the form of a properly designed ground plane.

In MOST cases the cost of placing a decoupling cap near every pin that connects to a common bus is small compared to the potential benefits. ie do it if you can.

In most cases the best value to use is the best value for the task concerned. Number of device sharing a decoupling capacitor may affect value but ideally choose a cap that best deals withe the noise present at a point. One upon a time, best advice was to use 0.1 uF ceramics at each pin to be decoupled. The improvement in specs of ceramic caps mean that 1 uF may have as good or better high frequency responses. AND/BUT the increase in clocking signals of top processors and logic families mean that frequencies are often higher, edges sharper and that lower values of caps may be indicated. So, 0.1 uF to 1 uF is a good choice still. At some locations liable to be especially significant the use of a 10 uF solid Aluminum, 1uF + 0.1uF and maybe even 0.01UF all near each other "may help".

Also note the output cap needs of some LDO regulators to have caps of selected ranges and ER values at their input.

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  • \$\begingroup\$ "Stop local peak load effects radiating to other components" -- I might word as "propagating" rather than "radiating" (which implies EM-field effects) \$\endgroup\$ – Jason S Mar 12 '12 at 20:11
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Since capacitors are used to reduce voltage fluctuations, and all the chips are drawing upon the same VCC, can I just use one big capacitor for all the chips? If yes, do I just add the capacitance of the small ones together use that value for the big one?

No, because many small local capacitors are a much better solution than one big capacitor.

Let's draw an analogy: You're building a deck, and the plans for the deck call for 16 support posts located at various locations. The support posts are so-called "4x4" posts which are actually 3.5" x 3.5".

You decide, "Hey, that's 196 square inches. It just so happens that it's the same area as this big tree trunk I just cut down. Why can't I just use this as one big support in the middle of the deck?"

So you put the tree trunk in the ground in the middle of where the deck's going to go, and build the deck on top of it.

What happens? Well, right on top of the tree trunk, you have a nice solid deck. But take a few steps away, and the deck gets rather bouncy, and at the edges it starts to sag precariously. Because the deck flooring isn't infinitely stiff, so the tree trunk is only helping at the point of support, and it's not distributed throughout.


The same principle applies to capacitors. They're used in circuits to help "support" power supply voltages at their local point of use.

And unlike wooden deck supports, capacitors have an even more critical aspect issue: at very high frequencies, they stop looking like capacitors and more like inductors, at which point they do a lousy job keeping the power supply voltages constant. The frequency at which this occurs is higher for smaller-value capacitors. So with modern processors, you'll very often see capacitors in the 100pF-10000pF range, in addition to the standard 0.1uF bypass capacitors, because they still remain useful at higher frequencies.

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All the chips do draw on the same VCC supply, but the supply isn't perfect. Under most conditions, you don't have to worry about the impedance of the supply traces or the slew rate of your supply. Under these assumptions, you could remove all the capacitors.

In the real world, your ICs will draw large amounts of current very quickly, and the plane or trace from your voltage regulator to the IC looks like an inductor. This high-frequency current wave through the accidental inductor causes VCC to have a lower voltage near the IC which is drawing lots of current, which could have adverse effects on your circuit.

To combat this, a capacitor should be installed to short-circuits this high-frequency wave. By locating the capacitor physically near the IC, the parasitic impedance is reduced to a minimum, and the circuit suffers no adverse effects.

To understand what actually happens here requires a significant investment in electrical engineering education; an EMC course or series of courses is should be present at any decent university. For now, though, the answer is: No, you need caps of the specified as physically close as possible to each of the ICs you're using.

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