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In practice, the effects/results described below are much easier to achieve with an MC -- I know.

However, for the sake of understanding and learning, I was considering the following scenario to be solved with basic ICs only, and could not find a good enough solution:


A counter system provides four decoded decimal numbers, i.e. for each digit there is essentially a 10-line bus. (think: http://www.electricstuff.co.uk/nixcct.pdf with the last flip-flop (UBA) replaced by another 4017)

I was considering how one could tweak this to display the numbers on one output device (in the above example, one nixie tube) sequentially, let's say, displaying one digit every second.

Now, one solution I came up with was to use four bus switch ICs which are driven from e.g. Pins Q0-Q3 of U5. This is in theory very neat, but the routing (more like wiring) would be a nightmare, well, quite a mess for single, even double sided PCBs. Also, bus switch ICs are comparatively expensive and are often available only in bulk.


So, my question is: What would be an better solution to achieve this goal with basic ICs (not FPGA or MC)?

EDIT: PI3B4011 seems like something I could use, however, I this chip seems to be obsolete (and is in the particular package not handsolerable). Any suggestions for surrogates?

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  • \$\begingroup\$ I'd use a digital clock chip and a 4 to 16 line decoder \$\endgroup\$
    – Andy aka
    Commented Jan 9, 2017 at 12:03
  • \$\begingroup\$ @"Andy aka": How does a 4:16 decoder help me in the described scenario?! \$\endgroup\$
    – A Sz
    Commented Jan 9, 2017 at 12:05
  • \$\begingroup\$ It means that multiplexing a 4 bit binary value is simpler than trying to do it with already-decoded outputs \$\endgroup\$
    – Andy aka
    Commented Jan 9, 2017 at 12:32
  • \$\begingroup\$ @"Andy aka": I see, how using four undecoded bcd counters and using a dmultiplexer/decoder at before the Display unit helps. -- but then I still need to multiplex four 4-channel signals, don't I? \$\endgroup\$
    – A Sz
    Commented Jan 9, 2017 at 14:06
  • \$\begingroup\$ I didn't suggest "four undecoded bcd counters". I suggested a digital clock chip. \$\endgroup\$
    – Andy aka
    Commented Jan 9, 2017 at 14:13

2 Answers 2

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The simplest would probably be to put some 10-bit 3-state line buffers after the 4017s. Something like 74ABT827 (working with 5V supply - or 74LVC827 if you're working with 3.3V). Wire the four Y1 outputs of the four 74xx827 chips together, the four Y2 outputs together, etc... up to the four Y10 outputs. You'll get the combination of digits you need on the resulting 10-signal bus.

Now, you have to ensure only one 74xx827 chip is enabled (using the OE1/OE2 input) at a given time (or there will be contention), and that each chip gets enabled for the requested time, cycling one after the other.

For this, a possibility is to use another 4017, wire its Q4 output to its RST input, and wire each of its Q0-Q3 output to each of the OE1/OE2 inputs of the 74xx827 chips through an inverter (don't forget the inverter!). Then clock this 4017 with whatever signal that has the appropriate frquency on the board (the 1Hz output from U4, maybe?).

Note: the 4017 may not initially have its Q0 output active on power-on. So you may have to wait for a few seconds for the display to show up if the active output is somewhere from Q5 to Q9. To prevent this, wire the OR-combination of all outputs from Q4 to Q9 to its RST input, rather than just Q4.

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  • \$\begingroup\$ Maybe I wasn't clear in my original description, but this is essentially what I was considering, and looking for a better solution: wiring together all four Y1, all four Y2, ... all four Y10: that's exactly the routing/wiring nightmare I was referring to. I don't see how to route that on a PCB without tons of jumpers. (EDIT: I was considering using two 3VH16861 [each can be used as two 10-bit bus Switches] -- which would have effectively the same function as your four 74xx827). \$\endgroup\$
    – A Sz
    Commented Jan 9, 2017 at 15:27
  • \$\begingroup\$ Ok. Indeed, I didn't realized that was what you meant with the term "bus switch" you used. These are called "bus buffers" or "bus drivers". I therefore thought you meant regular muxes, wich would be even more complicated to wire. Well, in that case, I see no simpler solution. Sorry. \$\endgroup\$
    – dim
    Commented Jan 9, 2017 at 15:32
  • \$\begingroup\$ No simpler solution, except for using a single MCU that would do the whole job the tens of ICs here achieve, of course... But since you already mentioned that at the start of your post... \$\endgroup\$
    – dim
    Commented Jan 9, 2017 at 15:34
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    \$\begingroup\$ As for the routing, can you route 10 tracks under a chip, between both pin rows? If you can, you don't need any jumper. \$\endgroup\$
    – dim
    Commented Jan 9, 2017 at 15:48
  • \$\begingroup\$ 10 tracks under the chip? Have to check that with the clearances, given relatively high voltage. -- Please, also see my my recent edit! I think I found a single logic chip which would be suitable, but that's either out of production or sells at a ridiculous price for whatever other reason (USD 80). \$\endgroup\$
    – A Sz
    Commented Jan 11, 2017 at 12:13
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You seem to be into "retro logic" (and very retro display), but it is uncertain what you mean by basic ICs. Would you consider an old-style UVEPROM or EEPROM a basic IC?...one that has parallel address input, and eight (or sixteen) bit parallel output.

If so, then use a conventional binary counter to generate EPROM address, and simply connect data output to NIXIE drivers. Many parallel-access PROMs have adequate memory capacity so that multiplexing could be avoided. Memory could be conserved by incrementing address ADR2 once every minute, while using ADR0, ADR1 as an equivalent to 4-digit scan MUX, incrementing once-per-second.
This solution does have a FPGA flavour which you may find distasteful, but such a solution might have occurred to a pre-FPGA circuit-designer.
After considering the design, build your clock using a microcontroller - either using a 32768 Hz. crystal time base, or by counting 50 Hz. (or 60 Hz) line frequency - marrying old-school with new is cool too.

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  • \$\begingroup\$ Yes, definitely "into retro logic" -- for learning purposes. Parallel bus EEPROM sounds actually alright, though with parallel bus EEPROMs falling out of use, they are (comparatively) pricey. \$\endgroup\$
    – A Sz
    Commented Jan 11, 2017 at 13:08

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