I'm working on a project that involves periodically reading 16x 0~5V analog voltages from identical FSR voltage divider circuits using an ADC. Each FSR is connected to a gain/LPF stage before being read by an ADC. Each FSR's signal conditioning circuit is identical.
Originally, I was going to use 4x LM324's for the gain and filter stages of all 16 signals (along with all of the passives needed for the feedback networks). Having 16 of everything (including passives) seemed unnecessarily redundant if all of the gain/filter circuits were the exact same, so I thought about using an analog mux to switch between each FSR's signal, and have the muxed signal fed into a single signal conditioning circuit and ADC.
My reasoning behind this: if I needed to modify the gain/filter circuit, I could simply update the components once, as opposed to updating 16x of everything.
Currently, I'm implementing this design using a PSoC 5 LP, since it has the analog mux / op amp / ADC all in one package:
I am not well-versed in designing for multi-channel data acquisition applications like this, and would like to hear if this seems like a good/bad design, or if you think there is a better (or more elegant) way of approaching this task.
EDIT (1): The datasheet for the specific PSoC 5 LP chip (CY8C5888LTI-LP097) is located here. By "FSR", I mean "force sensing resistor". The set of 16 ADC measurements are taken at approximately 200 Hz (i.e. all 16 measurements must be taken in less than 1/200th of a second). I am currently operating the Delta-Sigma ADC at a 12-bit resolution. The output of each FSR voltage divider ranges from 0V (approx. 0 force applied to the FSR) to ~5V (maximum force before FSR saturates).
EDIT (2): The signals from the FSR voltage divider circuits would be in the low end of acoustic frequencies (the FSR's are measuring an occupant's exerted forces/pressure on the surface of an office chair), from roughly 500 Hz to DC (0 Hz) frequencies. I don't intend to capture all of the frequency content of the signals - hence the lower sampling rate.
Also, here is an image of the voltage divider circuit for the force sensing resistors.