It's generally the first step to calculate the collector resistor Rc, according to the operating collector current Ic and collector-emitter voltage Vce required.

Rc = Vce / Ic


Rc = Vcc / Ic(max) both result the same for a Class A amplifier.

In the "hyperphysics" example however it is said that "The resistance Rc+Re determines the maximum collector current..." and

Rc + Re = Vcc / Ic(max).


I find this site to be a very informative and credible one, so it makes me doubt.

  • \$\begingroup\$ There must be hundreds of design answers on this topic on this site. Have you reviewed any of them? What do you want to achieve? \$\endgroup\$ – jonk Jan 13 '17 at 8:48
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    \$\begingroup\$ The resistance Rc+Re determines the maximum collector current... True, with the emphasis on maximum, i.e. when the transistor is fully on, Vce = 0. That is not the biasing point as it has no headroom as Vce = 0. It is the maximum Ic which can flow at the peak of the input signal (and the bottom value of the output voltage). \$\endgroup\$ – Bimpelrekkie Jan 13 '17 at 8:48

If you have an emitter resistor and a collector resistor then the maximum current that can flow is when the transistor is turned on as hard as it can be. If this is assumed to produce a collector emitter volt drop of zero volts then: -

Ic = \$\dfrac{Vcc}{R_E+R_C}\$

If the transistor saturates only to (say) 50 mV then you have to use a figure for Vcc that is 50 mV lower for calculating Ic.

It's generally the first step to calculate the collector resistor Rc, according to the operating collector current Ic and collector-emitter voltage Vce required.

A class A amplifier is going to drive some form of load so it is important to choose a low enough value of Rc so that the application of the load doesn't overly affect the amplifier's gain. So here's another way of looking at it - you consider what the load is and choose Rc accordingly. Then you assume the quiescent operating voltage is half Vcc (or maybe a tad higher if you factor in the emitter dc volt drop) and this dictates Ic.

So no, the first step you take is not generally dictated by the operating current. More often it is dictated by the external load.

  • \$\begingroup\$ Looking at the characteristic diagram of a transistor, when the base current is zero, we still have a current due to the Vce. That is the reverse saturation current through the collector-base diode. In the reverse diode responce curve, after a certain external voltage, a saturation current is reached. It is the current which is only dependent on the temperature and the number of available free/mobile charge carriers. \$\endgroup\$ – Xynon Jan 17 '17 at 19:14
  • \$\begingroup\$ And what does the forward biased emitter-base diode do? It pumps more electrons into the collector region. Electrons forced into the collector region pushed through the strong /wide (because of reverse biased) potential barrier (depletion layer) on the collector-base junction. I once read somewhere an analogy describing these electrons as “the cars (electrons) that are fast enough (with enough energy/voltage given by the base-emitter potential) that cannot take a very sharp turn (cannot be stopped by the very thin base layer) and fly off the road (into the collector). \$\endgroup\$ – Xynon Jan 17 '17 at 19:15
  • \$\begingroup\$ That was very crucial for me to have an idea about transistor operation. From then on, I made myself used to considering the transistor as a kind of “connection” between two separate circuits. The output circuit and the input circuit. I didn’t think of the Vcc-Rc-transistor-Re-ground as a single circuit (with branches). I think of Vcc-Rc-output and Vcc-voltage divider-Vb-Vbe-RE-ground as two “semi-separate” circuits with at somewhere (the base layer) they get so close that a current leaks through the base layer. \$\endgroup\$ – Xynon Jan 17 '17 at 19:15
  • \$\begingroup\$ So, even when the transistor is fully turned on, I don’t imagine it as a single piece “equivalent resistor”. It doesn’t mean “it’s very conductive” to me. It means “the emitter-base diode is providing enough electrons per second to “help” the collector region have enough current through itslef to satisfy/neutralise electric field on itself which is dictated separately by the Vcc and the Rc values”. \$\endgroup\$ – Xynon Jan 17 '17 at 19:15
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    \$\begingroup\$ The external emitter resistor, when used, provides negative feedback and hence regulation and, ignoring minutiae, really does control collector current in a linear (non saturated) application. You set the base at say 2 volts and the emitter is dragged from 0 volts to about 1.4 volts. This forces 1.4 volts across the external emitter resistor and therefore, ignoring minutiae, the collector current is forced to tow the line. The physics and analogy are fine. \$\endgroup\$ – Andy aka Jan 17 '17 at 19:30

The total emitter resistance --- often one R bypassed with large-value capacitor and another R to set denominator of GainEquation --- is key in setting collector current.

But that current, times Rcollector, the voltage subtracted from VDD, sets the headroom for your CE amplifier.

As a kid, I eventually realized a ROBUST CE amplifier could have the total_Re be the same as Rc, with base biased to VDD/3, and I'd be guaranteed a fine low distortion amplifier, because the headroom was also VDD/3 and the peak-peak swing was 2/3 of VDD.

In such a circuit, Re = Rc, the default gain is approximately 1. With phase inversion between base and collector; thus Ve and Vc can be used to drive a pushpull power amplifier.

If you seek gains higher than 1, simply chop the Re into 2 resistors and put a seriously-large capacitor across one of those resistors. The other R, call it R_e_gainset, gets divided into Rc, to predict the gain.

There are some error sources in this model, such as ignoring the GM of the transistor; I model that as "reac" being 1/GM; thus bipolar at 1mA has 39 ohms reac[at 10mA, reac is 3.9 Ohms]. Simply add that to the R_e_gainset to be more accurate. The collector Rc can be tweaked with Rload also being in parallel, along with Vearly_voltage in parallel. This concludes the DC/lowfreq errors.


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