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This is from an assignment. I don't understand how they came to the answer shown, can you please explain? enter image description here

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closed as unclear what you're asking by Marcus Müller, DoxyLover, Dmitry Grigoryev, Voltage Spike, ThreePhaseEel Jan 16 '17 at 19:58

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  • \$\begingroup\$ So, what have you tried? what were your problems? Where did you get stuck or get a different solution? \$\endgroup\$ – Marcus Müller Jan 15 '17 at 19:49
  • \$\begingroup\$ Do you understand what a 3>8 decoder does? Do you understand what a 4>1 mux does? Do you understand what a truth table is? What exactly are you having trouble with? Would it help if I said 'draw a truth table for a 3>8 decoder' first? \$\endgroup\$ – Neil_UK Jan 15 '17 at 19:53
  • \$\begingroup\$ yes i understand how to get the truth table of each alone, but one truth table for both thats what i didnt understand \$\endgroup\$ – Abdu Fayad Jan 15 '17 at 20:08
  • \$\begingroup\$ The behaviour of a combinatorial (no latches or flip-flops) circuit, such as you have, can always be described by a truth table. A combinatorial circuit produces specific and repeatable levels on its outputs for each of the possible patterns on its inputs. For example, your 74HCT138-ish demux is made of lots of little AND/OR/NOT gates internally, each following a truth table. And that whole demux circuit, seen as a chip/block to you, itself follows a truth table. So can see how your entire logic circuit here also follows a truth table? That's the first step... \$\endgroup\$ – TonyM Jan 15 '17 at 20:36
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    \$\begingroup\$ I'm voting to close this question as off-topic because its homework with no attempt at a solution \$\endgroup\$ – Voltage Spike Jan 16 '17 at 16:52
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You could solve this problem naively by drawing out a huge truth table with (A, B, C) inputs, and columns for all the signals (the 8 outputs from the decoder, the 6 inputs to the mux, and finally "F", the output from the mux).

You're probably getting tripped up by the shear number of signals -- each intermediate signal must be captured to be able to trace it through. Start with the first row of the truth table for the 3x8 decoder:

A, B, C || Out0 | Out1 | Out2 | Out3 | Out4 | Out5 | Out6 | Out7 
================================================================
0, 0, 0 ||  1   |  0   |  0   |  0   |  0   |  0   |  0   |  0

Now follow that through the combinatorial logic to figure out the inputs to the mux. To do that, we have to add additional columns for all the mux input / switching signals:

A, B, C || Out0 | Out1 | Out2 | Out3 | Out4 | Out5 | Out6 | Out7 || In0 | In1 | In2 | In3 | S1 | S0
===================================================================================================
0, 0, 0 ||  1   |  0   |  0   |  0   |  0   |  0   |  0   |  0   ||  1  |  0  |  1  |  0  | 0  | 0

I think new students get hung up at this stage in the game. In0 is simply equal to Out0 (and has nothing to do with A, B, or C), since it's just a straight wire connecting the two. In2 is the inverse of Out2, so it will always be whatever Out2 is, but flipped -- again, these signals have nothing to do with (A, B, C) -- they're only dependent on the outputs from the decoder. This should be evident from looking at the schematic you posted.

Once you've figured out what signals are going into the mux, now, finally, look at In0-In3, along with S0 and S1, to figure out what the mux is outputing (you may want to look up or draw a stand-alone mux truth table):

A, B, C || Out0 | Out1 | Out2 | Out3 | Out4 | Out5 | Out6 | Out7 || In0 | In1 | In2 | In3 | S1 | S0 || F
=========================================================================================================
0, 0, 0 ||  1   |  0   |  0   |  0   |  0   |  0   |  0   |  0   ||  1  |  0  |  1  |  0  | 0  | 0  || 1

In other words, when S0 and S1 are both 0, the mux selects In0, which happens to be "1" -- so the output for this line of the truth table is "1"

Again, the mux's operation has nothing to do with (A, B, C) inputs, but instead, the intermediate signals we've drawn above.

Once you've done that for one row, do it for all other input combinations:

A, B, C || Out0 | Out1 | Out2 | Out3 | Out4 | Out5 | Out6 | Out7 || In0 | In1 | In2 | In3 | S1 | S0 || F
=========================================================================================================
0, 0, 0 ||  1   |  0   |  0   |  0   |  0   |  0   |  0   |  0   ||  1  |  0  |  1  |  0  | 0  | 0  || 1
0, 0, 1 ||  0   |  1   |  0   |  0   |  0   |  0   |  0   |  0   ||  0  |  1  |  1  |  0  | 0  | 0  || 0
...
1, 1, 1 ||  0   |  0   |  0   |  0   |  0   |  0   |  0   |  1   ||  0  |  0  |  1  |  0  | 0  | 1  || 0

That is the "mindless busywork" way of solving this problem.

Having said all that, it's much faster to solve this by inspection. Start with (A, B, C) = (0, 0, 0). The 3x8 decoder will output a "1" on output 0, and a "0" everywhere else. Instead of writing out all the signals, let's jump a head a bit: notice that outputs (4, 5, 6, 7) are all "0" for this case, so when they get OR'd together, S1 and S0 are both zero, which selects input 0 on the mux.

As a result, we don't even care about signals 1, 2, 3. Since signal 0 is a "1" from the decoder, and since the mux routes input 0 to the output, the output F from the mux is "1". That was for (A, B, C) = (0, 0, 0), which matches your answer. Now do the same for the other 15 rows in the table. If you don't understand what I just did, you probably need to go back and learn what decoders and muxes do.

This is a fun problem to work through, because you can save a ton of time working backwards a bit. Note that (S0, S1) will always be (0, 0) -- thus selecting input 0 -- until (A, B, C) select input 4, so when they're selecting 1, 2, and 3, signal 0 will be stuck at "0", and since this is always the signal selected by the mux, you immediately know that rows (0, 0, 1), (0, 1, 0), and (0, 1, 1) in your truth table will all be "0".

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