Designing a CE Fixed Gain Amplifier with a PNP Transistor

Question

I was given a task to design a fixed-gain CE amplifier using (NB) a PNP transistor. I have a bunch of requirements and set values.

Most of the tutorials online only use NPN transistors, and while I know that they are essentially the same apart from a few current directions and polarities, I have no idea where to start. I know how the diagram is supposed to look, but I'm not sure in how I'm supposed to do the design to get the required values. Also, most of the questions already asked refer to NPN or to variable gain amplifiers.

Features needed:
- Input voltage range input should be 10mV(p-p) - 100mV(p-p)
- for a frequency of 10kHz, the output is expected to be 2V(p-p)
- bandwidth test should be performed with respect to a -3dB cut-off point, altering the frequency when the amplifier is energised.

Requirements:
- Vcc = 19V
- R(LOAD) = 432R
- Av = 8V/V

I just need to know where to start - I don't know what to do with the fixed-gain. I don't want someone to do the design for me - just provide a guideline of the starting steps I should take to do the design

Answer 1

The process with a PNP transistor is exactly the same as with an NPN transistor. Just flip the supply polarity and any electrolytic cap polarities/diode polarities and it will work with a PNP. If you have a negative supply that would be preferable, though it would be possible to have the input referenced to the supply and have the collector load resistor grounded. That is usually not preferred because it will amplify noise on the supply voltage wrt ground.

For the fixed gain, think of emitter degeneration to control the gain.

Your requirements appear to conflict- if the gain is 8 and the maximum input is 100mV p-p the maximum output should be 800mV p-p.