# BJT push-pull for a MOSFET

I'm looking for a way to drive a MOSFET with discrete components. Actually I need to drive a bunch of MOSFETs, with currents of 100-150A. And I'm wondering it would be possible not to use driving ICs, to have more control over functionality, less complexity, less cost.

I've experimented with different arrangements, with resistors and capacitors. I'm using an oscilloscope to monitor ringing, rise/fall times etc.

The problem is that as soon as I introduce resistors, rise/fall time becomes very high.

The input signal has a rise/fall time of only about ~8-10 ns. Using the BJTs alone, the signal is easily duplicated at similar rise/fall times. But once the gate capacitance is introduced, the rise/fall time becomes significantly higher, e.g. 300-2000 ns.

I've thus been experimenting with different methods to reduce the rise/fall time:

Method A: NPN+PNP (Voltage-follower? current sourcing from Vcc?)

I made the following circuit, not realizing that the gate voltage would never be more than the input signal voltage.

I need the gate voltage to be more than 10V to minimize Rdson.

simulate this circuit – Schematic created using CircuitLab

Method B: PNP+NPN

I've experimented with different resistors and capacitors:

simulate this circuit

But I found that:

• The capacitor reduces rise ringing, but increases fall ringing and time => removed
• All resistors except R2 and R3 had a detrimental impact on rise/fall characteristics => removed
• Using potentiometers for R2 and R3, I found that the best resistance was R3=4k and R2=1.5k.
• Rise time 490ns, fall time 255ns.

I'm a bit worried that the gate voltage isn't dropping low enough, e.g. seems to stay at around 400mV. Although ground seems to be read at 250mV, so maybe the breadboard is just crappy. How low should the gate voltage be to prevent any heat build-up in when the signal is constant low (off)?

I'm wondering if there's anything else I can do to improve the performance?

Improved circuit:

simulate this circuit

Oscilloscope:

Note: apparently the input signal was inverted on the oscilloscope by setting. I'll update the screenshots later...

Also, I've included the base of the PNP in the following screenshots. Is it supposed to look like this? It looks a bit funky.

It seems the problem is that the NPN stays switched on, thus preventing the gate from charging.

• It's not clear if your signal generator is producing a signal switching between 0 and 5 V or -2.5 and +2.5 V, or -5 and +5 V, or what. A scope trace would help, or an indication of what device you're representing with that symbol. Jan 19, 2017 at 21:17
• If the base of the NPN is at 5V, and the emitter is at 6V, then why would it be conducting? Jan 19, 2017 at 22:08
• Why do you even need a driver circut? 5V is enough to turn on that MOSFET and get on resistance to 0.004 Ohms. And where is this ringing you speak of? If it's at the load then your barking up the wrong tree. You would need a snubber across the MOSFET. Jan 20, 2017 at 3:49
• @VincePatron, I need to drive 100A. But perhaps I'll be better off with Rdson of 4mOhm with fast switching, than 2.5mOhm with slow switching. Also, I expect to need to drive about 8 MOSFETs, so I'm not sure the MCU can provide enough current. Long story short, I thought using BJTs was an easy solution, but it's obviously not. Jan 20, 2017 at 10:44
• Still needs improving. Q2 is hevily overdriven. =>> enormous turn off delay (=storage time). Nothing has been done against the overdriving. In the past those countermeasures were well known, but they seem today been left among the dust. Secondly: Q1 pushes continuously and Q2 has a hard job to win it. Probably the minimum Vgs is around 0,3 V. You should use the 0V/5V PWM output thru a nonsaturating buffer amp that can inject and pull out enough charge from mosfet's gate during wanted state transition times. Want to know more? Please write a comment . Refer my answer.
– user136077
Jan 21, 2017 at 2:06

Other folks have already suggested IC MOSFET drivers. Sounds like you really want to do a discrete driver.

Here's a circuit and it's basically what would be inside a driver IC. This results in 100 Amp switching with about 100 ns transition time to keep MOSFET power dissipation at a minimum.

Q1 is a simple inverting level translator to get the signal swing to 12 Volts. M2 and M3 form a MOSFET push-pull driver. R4 and R5 are there to limit the shoot-through current to prevent damage to M2 and M3 because as their gates transition between 0 and 12V they will be both on for a small fraction of time.

Without R4 and R5, the shoot-through current would exceed their maximum drain current ratings. In an actual IC, M2 and M3 would be sized small enough to have high enough Rds-on instead of putting actual resistors.

Additionally, M2/M3 does an inversion to get back to normal logic. Finally, M3 serves as the high current driver to handle the 100 Amp current.

Note that there is about 2 us delay in shutting off M1. If you're not switching your load at a high frequency, then this 2us would be of no concern.

I definitely would not recommend using these parts; I just picked these from whatever LTspice had. For example, M1 is limited to 35A continuous, so replace these parts with something appropriate for your design and re-run the simulation. Then test out in your prototype to confirm performance. Anyway, this circuit might be a good starting point for you.

• > Here's a circuit. a good circuit. I would suggest that the OP does an analysis on how much current he needs to deliver into the gate. if he is switching a 100a load, it is a very beefy mosfet. at moderate frequencies, he will likely need to deliver multiple amps (peak) into the gate. Jan 21, 2017 at 22:52
• for the above circuit to do that, you have to reduce the two 22R resistors. then the issue of shoot-through pops up and you have manage dead time. Jan 21, 2017 at 22:53
• The major slowdown cause here is "the same old and so typical today", it is "no tricks used to keep BJT switch fast". The missing tricks are 1) speeding capacitor, put 50 pf parallel with R2 2) prevent saturation by clamping, it means put a low fordward drop diode at Q1 from b to c to suck off the exessive base current. A schottky diode is good, a germanium diode is passable. Diode's anode to b, cathode to c. I tried to insert these tricks as an edit, but the peer rejected it (no old timers any more alive in the peer?)
– user136077
Jan 23, 2017 at 9:57
• Sounds like an excellent improvement. Was probably rejected because it would be more appropriate as amother answer. Please post it as a new answer. We'll all learn from it. Or I'll try it later on and edit this answer m Jan 23, 2017 at 14:56
• The speedup capacitor and baker clamp are mentioned in electronics.stackexchange.com/a/135904/30711 and electronics.stackexchange.com/a/509597/30711 along with a suggestion to replace the BJT+speedups with a 2N7000 MOSFET. Dec 19, 2021 at 15:08

Your BJTs are in a follower configuration. This means that they can provide current gain, but not voltage gain. In fact the emitters will be a diode drop BELOW the base for positive going signals. If you got to 6V on the gate you must have had around 6.7V out of your signal generator.

The BJT Wiki page has links to the 3 common forms of amplifier which explains more about the characteristics of BJT amplifiers.

BJT Wiki

The current gain is a good thing because in order to charge the gate capacitance of the FET in a short period of time you need high peak currents: I=C*dv/dt.

One way to get a higher voltage swing would be to add a BJT level shifter before your gate drive stage to translate from 5V to 12V. Of course a single stage BJT level shifter would invert the signal, but often you can deal with that at the signal source.

The pull-up resistor will have to be sufficiently small in value so that you get an acceptable rise time for your application. VCC would be your 12V supply and the base resistor should be sized to guarantee saturation with the 5V drive, given the beta of the transistor. !Y should connect to the bases of your BJT gate driver stage.

However, if your goal is fast rise and fall times from the FET and not learning about BJTs, you should probably use a commercial gate driver IC. Look for options from IR/Infineon, Texas Instruments, Intersil or Maxim.

Here's a low-cost option from TI:

UCC27517

• What should I use instead then? I first tried with the PNP between the gate and 12V, but it started smoking. Jan 19, 2017 at 21:14
• Also, would it make sense to use an opamp instead, such as the LM358P? Jan 19, 2017 at 21:16
• @user95482301: if you can afford to use an IC I suggest to use a dedicated level-converter/driver IC like proposed in my answer.
– Curd
Jan 19, 2017 at 21:37
• The IR2101 is a good choice too. Not sure where you saw the high price for the UCC27517, it is \$0.49 (1ku) on the TI website and they'll send you 10 pc for free as samples if you request them on the website. It's in a SOT-23 package which is pretty easy to handle for prototyping, but sounds like you would be more comfortable with the IR part. Jan 19, 2017 at 23:13

The first version - a push-pull emitter follower should be fine if only the max available mosfet VGS = +4,3 V is enough. The pulldown resistor about 100 Ohm should be inserted from BJT emitters to GND to ensure mosfet's off-state, because the PNP does not pull down effectively under +0,7 V. Additionally a few Ohm damping resistor inserted just into mosfet's gate terminal should prevent some ringing caused by capacitance and wire inductance.

Your second version has a shortcut. Think about the current route Q2 base->R3->R2->Q1 base.

Emitter follower has no saturation and thus no turn off delay due the diffusion capacitance.

As other answers propose, use a gate driver IC. It does the job with zero tuning and a having lower probablity to behave unthinkably during operation voltage transitions.

Addendum due questioner's comment that states the current to be 100 A

100 amperes on-state Id needs serious attention and even more if the switching rate is high. Do a test run by driving the gate from an ordinary 50 Ohm Zout square wave signal generator. Use low switching frequency and start with more than +6V unipolar signal for safety. Oscilloscope in Vgs gives an idea how big charge is needed to inject and remove for state transitions in wanted transition time. That determines the wanted drive current. Oscilloscope in Vds reveals the needed Vgs.

The described measurements are the basement for designing the driver capable enough.

• The problem is that I need to switch 100A, so Rdson needs to be as small as possible. Jan 20, 2017 at 10:39
• @user95482301 If you do the proposed test run with a signal generator, find the lowest usable generator output level for low enough Vds and publish the dual trace oscilloscope plot of Vds and Vgs, you very likely get a bunch of proper designs. The plot must well reveal the transitions. You must use the final load.
– user136077
Jan 21, 2017 at 14:42

Switching 100 amps quickly is dangerous, if not to you then to the lifetime of the circuit.

Assume 4" of wire, somewhere. That is approximately 0.1uH. Approximately. I'm very happy assuming 1 meter of wire is 1 microHenry inductance, because I can run some cautionary back-of-envelop computations and dodge major damage.

Lets turn off that 100 amps in 10 nanoSeconds. With 0.1uH inductance in source or in drain. What happens?

$$V = L * dI/dT$$ $$V = 100nanoHenry * 100 amps/10 nanoSeconds$$. The "nano" cancels. We have 100 * 100 /10, or ONE THOUSAND VOLTS.

If in the drain, you just wiped out the Power MOSFET.

If in the source, you'll likely get a negative-feedback behavior that prevents turnoff for many many nanoseconds. I've personally seen this happen, with long test leads in 9amp drivers.

• That's a really good point. I'm surprised no one mentioned it before. Perhaps someone else could comment as well? Feb 1, 2017 at 9:54
• Is there a remedy to this problem? Or would I have to approach the problem of current limiting in another way, e.g. with resistors? And isn't this a general problem, even for an ordinary SPST power switch? I'm also going to use this method for OVP/UVP/OCP for my battery bank, which would be in a steady on-state, but with a single switching event. I'm guessing that what you're describing would also be relevant in an over-current event. Would it be enough to have a 1000V-rated zener? I assume the power rating wouldn't have to be much. Feb 1, 2017 at 9:59
• Correction: V=L∗di(t)/dt, not V=L∗dt/dT. Source: en.wikipedia.org/wiki/Inductance. Nov 19, 2018 at 17:11
• How to address this? Use Ground planes under the wires and traces, if wires then use tape to hold the wires against the plane, use low inductance MOSFET packages, disperse the current thru multiple MOSFETs, and use RC snubbers (one on each MOSFET to ensure small distances) to momentarily absorb the magnetic-field energy and dissipate the energy. Aug 31, 2019 at 13:12

There are level-converting driver ICs just for such purpose, e.g. DS0026 or MC34151.

They have TTL/CMOS compatible inputs and have fast rise and fall times and are able to drive quite high currents; all features necessary to turn on and off MOSFETs quicky.

• Would it be possible just to use an opamp instead? Jan 19, 2017 at 22:37
• Found an answer to my question: "Fast turn-on and turn-off to avoid excessive power dissipation from running the device in its linear mode. This requires a device that can move a boatload of current very quickly. A 741 just won't cut the mustard." Jan 19, 2017 at 22:53
• An OpAmp has following drawbacks: (1) it can't switch as fast (2) it can't provide as much current as a specialized level-converter/driver IC. That results in slower charge/discharge of the MOSFET gate which will cause more power dissipation in the MOSFET.
– Curd
Jan 20, 2017 at 10:39

< why 0-6v?

Q2's emitter is 0.7v above Q2's base, which is 0-5v. That's your answer.

• Yes. I thought Q1 would pull it up to 12V, but I'm obviously wrong :) Jan 20, 2017 at 14:12

I'm a bit worried that the gate voltage isn't dropping low enough, e.g. seems to stay at around 400mV. Although ground seems to be read at 250mV, so maybe the breadboard is just crappy. How low should the gate voltage be to prevent any heat build-up in when the signal is constant low (off)?

It seems that MOSFET M1 is not getting low resistance path for proper turn off. It can be provided through a transistor to GND. This way M1 gate will discharge fastly.