I am programming a Cortex M3 bare-metal to talk with SPI Flash. One of the configuration bits of an SPI control register is FRF (Frame format). It can either be set to SPI Motorola mode (0) or to SPI TI mode (1). (See the ARM reference manual page 695 here.)

The datasheet of the SPI Flash (available here) does not give indication regarding which mode I should use.

What are the two different modes, and which should I use for the specific Flash chip I am using?


3 Answers 3


Motorola and TI mode refer to different configurations of clock polarity (CPOL) and clock phase (CPHA). The clock polarity dictates whether a high or low signal marks a clock, the phase tells the device when to sample the data line.

According to your ARM datasheet, you can set CPOL and CPHA for your SPI controller.

Your flash chip (See chapter 3) supports {CPOL=0, CPHA=0} or {CPOL=1, CPHA=1}.

For more information, http://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus#Clock_polarity_and_phase

  • \$\begingroup\$ Aha, thanks! So which is which? Is {CPOL=0, CPHA=0} Motorola or TI? \$\endgroup\$
    – Randomblue
    Mar 16, 2012 at 14:09
  • \$\begingroup\$ I can't remember, or find an authoritative source. \$\endgroup\$ Mar 16, 2012 at 14:25
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    \$\begingroup\$ Every time I have determined that @Randomblue it has been with a scope, I find it much easier to measure than to look up. \$\endgroup\$
    – Kortuk
    Mar 16, 2012 at 14:51
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    \$\begingroup\$ @Kortuk: By "scope" you mean "oscilloscope", right? That sounds quite exciting, but I've never done such a thing before. Could you point to a tutorial of some sort explain how to do this? \$\endgroup\$
    – Randomblue
    Mar 16, 2012 at 15:02
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    \$\begingroup\$ Sorry, but that answer is wrong. TI mode has not to do with polarity. For more detailed information go here: infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0194g/… \$\endgroup\$
    – user64958
    Jan 22, 2015 at 13:19

A brief glance at the ARM data sheet would suggest that the main difference between the TI mode and Motorola mode have to do with their handling of an output signal called SSPFSSOUT which many devices simply don't need. This signal is supposed to pulse high between bytes so as to indicate which bit of each byte should be considered the first. In TI mode, it goes high during the transmission of the last bit of a byte, while in Motorola mode it goes high and then low between bytes. The flash chip wants a chip-select signal which is held low for the entire duration of a transaction, so an output which goes high between bytes won't be useful for it.

I would expect that even when SSPFSSOUT isn't used, Motorola mode would make data easier to read on a scope (since there would be a pause after every byte) but TI mode might be faster (since it wouldn't waste any time pausing between bytes). What's important, however, is to ensure that the sequence of signals the controller generates meets the requirements given in the peripherals' data sheet.

  • \$\begingroup\$ Adding to supercat's reply, Refer to these images! I took them from a STM32F411E discovery board's reference manual. The following is depicting a SPI-TI mode based communication: SPI-TI mode. The following image here depicts the SPI-Motorola based communication (I call it the regular type, but being specific is better): SPI-Motorola mode. Forget the clock polarity and clock phase, look at the NSS pin timing diagram. \$\endgroup\$
    – Rohit
    Sep 23, 2022 at 9:24

It seems (previous) Motorola processors had something called big endian mode in which if the SPI master communicates with a slave device which has little endian registers, you have to convert the data received from the slave to big endian and you have to convert data from big endian to little endian while sending data to the slave.The other thing is about clock phase and polarity and if data is latched to rising or falling edge of a clock cycle. Referring to the manual of the processor to see its registers would help.


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