To know what value exists at address X one may simply read it using IORD and then send it via JTAG UART to the PC. However, to simplify debug process, is there a way to have visibility of certain addresses at all times where registers of certain peripheral are mapped so debugging is easier?


It isn't entirely clear what kind of visibility you're looking for. For peripheral registers (or any other hardware nodes, for that matter), there's always SignalTap, the FPGA equivalent of a logic analyzer.

If you want to monitor the values of a few memory locations, you can add "shadow" registers for those locations that you can also connect to SignalTap. A shadow register is write-only latch that gets updated whenever the corresponding address on the memory address bus gets written to.

  • \$\begingroup\$ I was expecting a spreadsheet like interface in which we have list of addresses on left and value in them on the right. Will consider signaltap as well. \$\endgroup\$ – quantum231 Jan 23 '17 at 8:25
  • \$\begingroup\$ If you're just looking for the ability to see the values of a list of variables when stopped at a breakpoint, doesn't the Monitor window in the Nios II GNU debugger console meet that need? See this document for an overview of software debugging on the Nios II. \$\endgroup\$ – Dave Tweed Jan 23 '17 at 12:23
  • \$\begingroup\$ ahaaaa the monitor window, that is a good idea. I am trying to learn the Eclipse IDE. I have not done anything complex in it before. Just trying to get my head around it at this time. Thanks for the input. \$\endgroup\$ – quantum231 Jan 23 '17 at 20:33

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