I did a digital design in Quartus II and my board DE1-SOC FPGA, now I want to read 3 factors: general speed that digital design takes to finish the application, area of the design if it would be a real chip, or at least the area taken in the FPGA, and lastly Power, I wish to have a estimation of the power utilized by my design.
This is to compare with another design made by a schoolmate.
How can I achieve this EASILY by using tools in Quartus.
Power Estimator is available in Quartus 2, but what about SPEED?
PD: As a homework, my design pick up a list of 57.600 8 bits binary numbers (.mif), one by one, pass it through some arithmetic and output 3 sets of 57.600 8 bits binary numbers in ON-Chip RAM. Actually I don't have any proposed constraints, or frequency to achieve, I only expect it to be "standard".
I wish to read any kind of simple estimation of power, area and speed.