I2C is defined from the ground up for multi-master operation. So, that's a gimme when everything is operational, but you have to ensure that a failed MCU won't pin the line low. This may be difficult to ensure.
The ADCs should be fine to sample the same point, but depending on output impedance of the sense point, input impedance of the ADC, and ADC architecture, it might be prudent to separately buffer the sample point for each MCU.
For digital, as long as you can guarantee that there will not be any bus contention, this should also be fine. A series resistance can alleviate the destructive effects of bus contention, if not.
As for outputs, you cannot drive the same signal directly from both MCUs with push-pull outputs. You could perhaps use open-drain outputs, but if one MCU goes in the weeds and pins the line low, you lose control of the signal. You could use logic gates to combine those signals if the control signal is well understood and you can guarantee that the MCUs will operate in lock-step and not glitch the signal timing.
There are dual core MCUs designed specifically for this application (safety/redundancy). It may make more sense to use one of those pending your application and cost sensitivity (they are expensive devices).