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Has anybody used TI's SN54LV132A NAND Gate in their design or have the reference schematic ?

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    \$\begingroup\$ If Steven's answer isn't what you want, its not clear what you're asking. You attach the inputs to two signals that are generated by something else. You connect the output to something where you want the inverse of the AND of those two signals. It's so simple, there isn't any "reference schematic." You just use it wherever you need a NAND gate. \$\endgroup\$ – The Photon Mar 17 '12 at 17:28
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A and B are the inputs, Y is is the gate's output. These are very common designators, and are also illustrated on page 2 of the datasheet. Pin designators on the pinout on the first page starts with the gate number, followed by the input or output designator. So 1A, 1B and 1Y are pins of the same gate.

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    \$\begingroup\$ If he uses a such fancy gate, he should at least know why, am I wrong? \$\endgroup\$ – clabacchio Mar 17 '12 at 18:00
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74LV132 datasheet

But the pinout is the same of the 74HC132

EDIT: It's a NAND with Schmitt triggered inputs. Basically does what the normal NAND does, but it has hysteresis in both input pins, so that there are two separate thresholds for raising and falling inputs.

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  • \$\begingroup\$ Thank you guys. But I already have the datasheet. I want to know how the input & output side of the gate is connected (For ex: Figure 1 in datasheet) or any application in which SN54LV132A is used... \$\endgroup\$ – Madhu Mar 17 '12 at 13:23

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