I've developed a board for a project and the company that is going to assemble it in a pluggable module has just asked me a weird modification.
Currently it's a 4 layer board: top signal, ground, power, bottom signal. Pretty standard.
They want me to swap the ground plane with the bottom signal layer. This way they can easily contact the mechanical case (that has a big heatsink) to the ground plane with a thin graphite layer. They aim to improve the heat dissipation of some critical components, already contacted to the ground plane through the component exposed pad.
I'm trying to figure out if this is a bad idea or not. Here are my considerations:
- The signals that are routed in the board are not HF, 10MHz at most, and there are no squarewave clocks in the board.
- The fastest edges of some signals have a settling time of few um and come through a connector from a different board, so they will be probably already filtered by the connectors parasitic capacitance.
- Having the reference layers so far from the signal layers seems a bad idea for the return paths. A better stack could be: (top signal, power, signal, ground).
- On the other hand, increasing the distance from the reference planes of those critical components (some very low noise TIAs) reduces the parasitic input capacitance (currently at about 0.5pF), thus reducing the output noise of the TIA configuration.
What are your thoughs?
Some answers to your comments:
Would it be possible to just add polygon pours on the bottom layer?
It might be, but there are a bunch of signals in an area that cannot be rerouted. Since the graphite is conductive, I would only rely on the soldermask to avoid short circuits, an the isolation on the vias could be a problem (I cannot use tented vias).
Are the signal layers flooded with ground?
Currently no. Mainly to reduce the input capacitance to ground of the TIAs, but there are some areas that I can definitely fill.
Can the hot components get moved to the bottom of the PCB?
No, they must be on the top layer due to other assembly and routing constraints.
Do they actually care where the power layer is, or do they just want the ground on the bottom?
They just asked for the ground to be on the bottom. That's why I considered the alternative stack (top signal, power, signal, ground).
Graphite is electrically conductive. If your vias aren't fully tented / filled, you will be in a whole world of problems.
I'm also very concerned about that. Furthermore, if I don't completely clear the area from signal traces I'm just relying on the isolation given by the soldermask, that can be easily scratched.