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I have designed a power amplifier for 1.2 kW output power that is working properly when I am testing it with my perfectly matched load.

There is problem of oscillation at DC as I connected a different load. I have checked the S11 of the load at operating frequency which is -30dB. Please suggest some solution for this problem.

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    \$\begingroup\$ Oscillation at DC? You mean you have 0 Hz oscillation or something else? Nobody here is a mindreader. \$\endgroup\$
    – Andy aka
    Feb 6, 2017 at 8:56
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    \$\begingroup\$ Based on the information provided here, the only thing we can tell you is that your amplifier must always be used with a matched load. We can't comment on your design unless you show it to us. \$\endgroup\$
    – Dave Tweed
    Feb 6, 2017 at 13:06
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    \$\begingroup\$ 1. Can you post a schematic and a photo? 2. Is it properly neutralized at the operating frequencies? 3. Does it have parasitic oscillation suppressors? \$\endgroup\$ Feb 6, 2017 at 19:51
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    \$\begingroup\$ My design frequency is 63.87MHz so by DC means without connecting RF input there are oscillations as i connect drain and gate DC voltages \$\endgroup\$
    – Vikas Jain
    Feb 7, 2017 at 8:15

1 Answer 1

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Have you plotted the stability circles? Do a load pull and plot these, they contain useful information.

Low frequency instability is often down to one of a few things:

Source impedance goes high Z at low frequency, unterminating the input: Either provide a low frequency termination or an input pad of a few dB or so to reduce the mismatch at the input. A capacitvely coupled input is a common gotcha here.

Power rail resonances, the DC injection choke can end up resonating with the supply capacitance in the audio or low ultrasonic region where LDMOS has gain for days. Adding some resistive losses helps (Either a resistor of a few ohms across a suitable inductor or in series with a modest electrolytic, this sometimes shows up as squegging).

These sorts of parts have HUGE gain at low frequency, and often a 10n cap and few hundred ohms of series resistor from each drain to the corresponding gate will help to tame this beast, you can use a little inductance here if it helps to reduce the effect of this network at VHF and up where the gain is actually useful.

Is this a swamped gate or tuned gate design?

Circuit diagrams, intended operating band and layouts would all be helpful for diagnosing this.

Having now seen the layout, there is no resistive load on the gates at all when the input is disconnected, with 30-40+dB of power gain down there, of course it oscillates.

Start by adding a few tens of ohms in a large SMT package directly between the gates, it will reduce the gain but improve the stability, 15 ohms or so is a good starting point.

What frequency is the thing going off at? If the problem is a low frequency oscillation then a few tens of nF in series with maybe 500 ohms between each drain and the corresponding gate will help to tame the very large LF gain, but start with that gate swamping resistor.

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  • \$\begingroup\$ I am using LDMOS transistor and design frequency is 63.87MHz with 5 MHz bandwidth. Circuit is working properly with standard match load connected through a attenuator. As i replace match load with my actual load then circuit is working properly but if i remove the attenuator then there is oscillation as i connected only DC gate and drain voltages. \$\endgroup\$
    – Vikas Jain
    Feb 7, 2017 at 8:30
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    \$\begingroup\$ The attenuator substantially isolated the amplifier from whatever your load is, (RL will be at least twice the attenuation over the full bandwidth of the attenuator). Only DC supplied? So the INPUT is unterminated, not surprised it honks. A Circuit diagram and photograph of the layout would be needed to provide more help. What frequency does it take off at? \$\endgroup\$
    – Dan Mills
    Feb 7, 2017 at 10:28

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