Say, I have a SPST CMOS switch, does it break the connection between two terminals when the power is out (Meaning Vdd=Vcontrol=0)? Or does it ground one terminal?
If it doesn't completely break the connection, what can I use as a switch that does?
I'm switching between AC signals (line audio) and I'm converging output of two switches (only one which is ON at a time) at a common output. I need to make sure one switch is ON when power is off, so I'm using a JFET switch for that one.
This question is for the other switch. I would rather not use enhancement MOS. Since it will either require a relay-like configuration which is undesirable (I can't afford LED current) or a diode in series with MOSFET. Because otherwise it would ground the output half of the cycle when it's off. Also note that if I end up using a series diode, it'll require biasing a corresponding signal so that the diode won't rectify it when the MOSFET's turned ON. I can't do a basic pull-up because I don't want to attenuate my signal. So I'll pretty much have to use an OPAMP.
How do CMOS switches behave when Vdd is grounded?
I need solid state SPST switch that breaks the connection completely (NOT grounding terminals) when power rail is grounded and it should be able to work with AC signals.
Edit-Edit: Updated images with much higher quality ones. This is a working schematic but it has problems such as DC biasing and headroom in a battery powered application. Vgs threshold needs to be very low in a real application since I won't have access to high voltages present below.