Consider the classic "pulse stretcher" circuit shown in Fairchild AN-140, Figure 12.
When the first gate drives low, the instantaneous capacitor discharge current will easily exceed the absolute maximum value for the gate sink current. Of course, the absolute maximum value is normally a DC rating, and the gate can actually withstand much higher currents for short periods. I guess this is the effect which this circuit relies on for successful long-term operation.
How can I determine if it's safe to instantaneously discharge 100nF 5V through an HC CMOS gate without a current-limiting resistor? I guess that is what the author is trying to establish with the "BE SURE THAT" equation below Figure 12. However, I don't understand why that equation is dependent on "t", and it seems to fail for any reasonable values of "C" anyway.