When should I use HDL or visual tools?

Question

I am a kind of software man, and I decided to learn how the computer works under the hood. So I have read a few computer architecture books, and now I have a decent understanding about how digital circuits work (at logic gates level). I want to design and build an 8-bit computer with a 16 bit address bus. I wanted to build it in a PCB with 74 series ICs, except RAM and ROM chips.

I have been using a visual digital circuit simulator called LogicCircuit. But while designing the ALU I have encountered the problem of testing, I cannot test that every works properly, I can only test it manully, but I wanted to have some kind of Unit Testing that I can program and run. For that purpose I discovered HDL (Hardware Description Language). But all the tutorials I have seen show how to build functionality coding and then a synthesizer compiled it to logic gates, so I think I wouldn't learn that much.

(1) Should I design everything first visually and then port every logic gate to HDL and test it?
(2) Do I simply have a misconception about what is HDL?
(3) Do you know a visual digital circuit simulator which supports testing (maybe a scripting language)?
(4) Should I simply do everything in HDL?
(5) When should I use HDL and when should I use visual tools?

By the way, currently I am using Autodesk Eagle to build the PCB.
Thanks, Pedro

Answer 1

If you want to build with 7400 series parts, then you may be better off directly designing with 7400 series parts and drawing up a schematic. However, it is possible to design in HDL and synthesize for 7400 series logic. The open source synthesis software yosys can actually target 7400 series logic for synthesis. It may end up being a gigantic pain to wire up and debug for a complex design, but it is possible.

I think it really depends on what it is that you want to learn. If you want to learn modern hardware design, then out with the 7400 logic. Get a reasonable FPGA dev board and work in Verilog or VHDL. And FYI, modern hardware design is not done at the gate level, it's generally done at the behavioral level with conditionals, register transfer operations, state machines, etc. The synthesis software then turns that high-level design into optimized logic that that targets your target device/process. If you want to build something out of 7400 series logic 'just because', then work at a schematic level and design directly with 7400 series parts. You can certainly write gate-level HDL (for most things, anyway) to validate that your design will work.