For 3 input XOR gate and XNOR gate, by solving the equations I got the result as in the picture. enter image description here So according to the solution the outputs of the 3 input XOR and XNOR gates are same. This solution holds good when number of inputs to the gates are odd.

For the case of even number of inputs XOR and XNOR are complement to each other.

With this assumption the answer to the circuit in the picture should be option A,B, and C. but the correct answer is D. I am confused as to how? enter image description here

Thanks in advance for the help.


The misunderstanding is that, given XOR as a logic gate, XNOR is defined as being always its negation.

Having defined your XOR-3 as an odd parity checker (by accepting the minterm \$xyz\$ - otherwise it would be a one hot checker), the correct interpretation of a XNOR-3 would then be an even parity checker (as pointed by Bradman175). This simply means that the expression for your algebraic XNOR-3 is not correct in this context.

In other words, \$x \odot y \odot z \ne \text{XNOR-3}\$.

Let's observe an implementation through logic gates.

A three way XOR gate can be implemented with a XOR-2 itself XORed with the remaining input, and remember that any XNOR has then to be rendered as a XOR in series with a NOT gate. Therefore, a XNOR-3 implementation would be:


simulate this circuit – Schematic created using CircuitLab

This yields a truth table coherent with the functionality expected above (1 when there are an even amount of input at 1). This also shows that a triple XNOR is algebraically rendered as

$$ \text{XNOR-3} \buildrel def\over = \text{NOT} (\text{XOR-3}) = \overline{(x \oplus y \oplus z)} = \overline{(xyz + \overline{x}\overline{y}z + \overline{x}y\overline{z} + x\overline{y}\overline{z})} $$

by carefully expounding all terms, you eventually get to the even parity checker expression which is

$$ \text{XNOR-3} = \overline{x}\overline{y}\overline{z} + \overline{x}yz + xy\overline{z} + x\overline{y}z $$

It follows that: $$\text{XNOR-3} =(x \oplus y)\odot z \ne x \odot y \odot z$$ as mentioned in the beginning.

  • \$\begingroup\$ Thanks, yes XNOR-3=NOT(XOR-3) makes sense rather than x⊙y⊙z≠XNOR-3. \$\endgroup\$ – turtle Feb 17 '17 at 5:36

XOR for more than 2 inputs is not well defined.

For two inputs, XOR yields 1 if the two inputs are different.

for three inputs, should XOR yield 1 if all or some of the three inputs are different?

  • \$\begingroup\$ For three inputs, XOR yields 1 for odd number of 1's at the input. \$\endgroup\$ – turtle Feb 9 '17 at 17:48
  • \$\begingroup\$ That's my very point. If you think XOR should yield 1 if the inputs are different, having XOR yields 1 for odd number of 1's makes no sense. Not that I am advocating to one or the other approach. It is simply to illustrate that XOR for more than 2 inputs is not well defined. \$\endgroup\$ – dannyf Feb 9 '17 at 18:10
  • \$\begingroup\$ Yes, may be. That's the reason also I am looking g for a more convincing explanation. As it helps to define the component better in the program later.! And thanks for the answer. \$\endgroup\$ – turtle Feb 10 '17 at 2:50

The last NXOR gate needs to have an even amount of inputs high to output high. This is because a normal XOR gate only turns on if an odd amount of inputs are high. The top two pins can never be both on or off at the same time, because their inputs are connected respectively to the same inputs and are the same type of gate except one is inverted.

Now things should be easier.

  • \$\begingroup\$ If I take the case as even number of inputs gives '1' at the output, then the above question's answer is D. But when I tried to solve by algebra method and then find the result, then answer is A, B and C. Where am I making the mistake! \$\endgroup\$ – turtle Feb 9 '17 at 11:07
  • \$\begingroup\$ @turtle Unfortunately I can't read the algebra because I haven't learnt it, but did you forget to indicate that the last XOR gate is inverted, thus being a NXOR? \$\endgroup\$ – Bradman175 Feb 9 '17 at 12:59
  • \$\begingroup\$ thanks for the help. I have considered the compliment part. But may be my understanding of the gate is wrong. I am unable to find explanation to convince my solution being wrong :) \$\endgroup\$ – turtle Feb 9 '17 at 17:47

According to circuit diagram option D is correct. There is no need to use Boolean algebra for this. Just go through the circuit. Output of 3-input EXOR gate is not same as that for 3-input EXNOR gate.


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